From 7e303581bcda7d7a4a90d75a9b6f6698d55287ce Mon Sep 17 00:00:00 2001
From: Wonkyu Kim <wonkyu.kim@intel.com>
Date: Fri, 6 Mar 2020 14:36:23 -0800
Subject: mb/intel/tglrvp: Add TGL UP4 RVP

Add initial TGL UP4 RVP build enviorment

BUG=none
BRANCH=none
TEST= Build TGL UP4 successfully

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Iab7ada0746394539586e7cc159112dc8208fdd7c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39363
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/intel/tglrvp/Kconfig.name | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

(limited to 'src/mainboard/intel/tglrvp/Kconfig.name')

diff --git a/src/mainboard/intel/tglrvp/Kconfig.name b/src/mainboard/intel/tglrvp/Kconfig.name
index a2271f33cc..eb8e796f69 100644
--- a/src/mainboard/intel/tglrvp/Kconfig.name
+++ b/src/mainboard/intel/tglrvp/Kconfig.name
@@ -1,2 +1,5 @@
 config BOARD_INTEL_TGLRVP_UP3
-	bool "Tigerlake UP3 DDR4/LPDDR4 RVP"
+	bool "Tigerlake UP3 RVP"
+
+config BOARD_INTEL_TGLRVP_UP4
+	bool "Tigerlake UP4 RVP"
-- 
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