From 3313a78e36da73f05da7402699f04909595a0c9d Mon Sep 17 00:00:00 2001
From: zaolin <zaolin.daisuki@gmail.com>
Date: Wed, 31 Oct 2018 16:43:43 +0100
Subject: northbridge/intel/fsp_*: Remove legacy SoCs

* Remove FSP Sandy/Ivybrige which are unused.
* Open Source implementation isn't final but
  good enough to replace FSP version.
* For new ports use NORTHBRIDGE_INTEL_IVYBRIDGE
  and NORTHBRIDGE_INTEL_SANDYBRIDGE

Change-Id: I7b6bc4bfdd0481c8fe5b2b3d8f8b2eb9aa3c3b9e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/29402
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/intel/stargo2/mainboard.c | 48 ---------------------------------
 1 file changed, 48 deletions(-)
 delete mode 100644 src/mainboard/intel/stargo2/mainboard.c

(limited to 'src/mainboard/intel/stargo2/mainboard.c')

diff --git a/src/mainboard/intel/stargo2/mainboard.c b/src/mainboard/intel/stargo2/mainboard.c
deleted file mode 100644
index c2b5d7d648..0000000000
--- a/src/mainboard/intel/stargo2/mainboard.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <string.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <boot/coreboot_tables.h>
-#include <southbridge/intel/fsp_i89xx/pch.h>
-
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
-void mainboard_suspend_resume(void)
-{
-	/* Call SMM finalize() handlers before resume */
-	outb(0xcb, 0xb2);
-}
-#endif
-
-
-
-// mainboard_enable is executed as first thing after
-// enumerate_buses().
-
-static void mainboard_enable(struct device *dev)
-{
-}
-
-
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};
-- 
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