From ce07b5c0ab304b2f13bbebd731dd1a8fc1077446 Mon Sep 17 00:00:00 2001 From: V Sowmya Date: Thu, 17 Dec 2020 08:03:03 +0530 Subject: mb/intel/shadowmountain: Add Intel Pre-CEP shadowmountain board This patch adds initial support for Alderlake Intel Pre-CEP board called shadowmountain. BUG=b:175808146 TEST=util/abuild/abuild -p none -t intel/shadowmountain -a -c max Change-Id: I9cb650c88986badd6733b001d6f2a0e338421829 Signed-off-by: V Sowmya Reviewed-on: https://review.coreboot.org/c/coreboot/+/48685 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Tim Wawrzynczak --- src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb | 5 +++++ 1 file changed, 5 insertions(+) create mode 100644 src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb (limited to 'src/mainboard/intel/shadowmountain/variants/baseboard') diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb new file mode 100644 index 0000000000..fbd7d72f9f --- /dev/null +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +chip soc/intel/alderlake + device cpu_cluster 0 on + device lapic 0 on end + end +end -- cgit v1.2.3