From 8216b46d7b9b88be4e31660362c4b9077670fd33 Mon Sep 17 00:00:00 2001 From: Jacob Garber Date: Wed, 29 May 2019 14:29:45 -0600 Subject: mb/{asrock,intel,purism}: Copy channel arrays separately DqByteMapCh0 and DqByteMapCh1 are declared adjacently in the FSP_M_CONFIG struct, so it is tempting to begin memcpy at the address of the first array and overwrite both of them at once. However, FSP_M_CONFIG is not declared with the packed attribute, so this is not guaranteed to work and is undefined behaviour to boot. It is cleaner and less tricky to copy them independently. The same is true for DqsMapCpu2DramCh0 and DqsMapCpu2DramCh1, so we change those as well. Change-Id: Ic6bb2bd5773af24329575926dbc70e0211f29051 Signed-off-by: Jacob Garber Found-by: Coverity CID 136538{8,9}, 140134{1,4} Reviewed-on: https://review.coreboot.org/c/coreboot/+/33135 Reviewed-by: Patrick Georgi Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/intel/saddlebrook/romstage.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/mainboard/intel/saddlebrook/romstage.c') diff --git a/src/mainboard/intel/saddlebrook/romstage.c b/src/mainboard/intel/saddlebrook/romstage.c index 45f39d46e2..46c2cdd6e0 100644 --- a/src/mainboard/intel/saddlebrook/romstage.c +++ b/src/mainboard/intel/saddlebrook/romstage.c @@ -49,8 +49,10 @@ void mainboard_memory_init_params( * should be set in the FSP flash image and should not need to be * changed. */ - mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0); - mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0); + mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0, + &memory_params->DqByteMapCh1); + mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0, + &memory_params->DqsMapCpu2DramCh1); mainboard_fill_rcomp_res_data(&memory_params->RcompResistor); mainboard_fill_rcomp_strength_data(&memory_params->RcompTarget); -- cgit v1.2.3