From 211e391a8295d48495ba5e4ebcde11ec85ed317f Mon Sep 17 00:00:00 2001 From: Sukumar Ghorai Date: Thu, 6 Jul 2023 15:23:32 -0700 Subject: mb/{google, intel}: Enable PCH Energy Reporting for MTL platforms This patch enables PCH to CPU energy report feature which can be used by Intel Telemetry Driver. BUG=b:269563588 TEST=Able to build and boot google/rex and perform below check to ensure the energy reporting is correct w/o this cl: # lspci -s 00:14.2 -vvv | grep "Region 0" Region 0: Memory at 957f8000 (64-bit, non-prefetchable) [size=16K] # iotools mmio_read32 0x957f8068 #i.e., 104th offset 0xXXXX0000 w/ this cl: #lspci -s 00:14.2 -vvv | grep "Region 0" Region 0: Memory at 957f8000 (64-bit, non-prefetchable) [size=16K] # iotools mmio_read32 0x957f8068 #i.e., 104th offset 0xXXXXfc004 Change-Id: I9bd4625ea311a05071878aaec68433a1ba018c0d Signed-off-by: Sukumar Ghorai Reviewed-on: https://review.coreboot.org/c/coreboot/+/76353 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Sridhar Siricilla --- src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/intel/mtlrvp/variants/baseboard') diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb index b7ce90daeb..f8f61a5611 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb @@ -52,6 +52,9 @@ chip soc/intel/meteorlake # Enable S0ix register "s0ix_enable" = "1" + # Enable energy reporting + register "pch_pm_energy_report_enable" = "1" + # Enable EDP in PortA register "ddi_port_A_config" = "1" # Enable HDMI in Port B @@ -334,6 +337,7 @@ chip soc/intel/meteorlake .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER, }" end # PCIE11 SSD Gen4 + device ref ioe_shared_sram on end device ref xhci on chip drivers/usb/acpi device ref xhci_root_hub on -- cgit v1.2.3