From b40c345947d7891070f46f67e9ded65d74d58f7a Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 11 Aug 2014 11:10:29 -0600 Subject: mainboard/intel/minnowmax: clean up includes & whitespace Clean up as requested in commit e6df041b. No functional changes. Change-Id: Iec3f7ee25fd8351c7e13d660e2df6461f7745478 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/6597 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/intel/minnowmax/romstage.c | 22 ---------------------- 1 file changed, 22 deletions(-) (limited to 'src/mainboard/intel/minnowmax') diff --git a/src/mainboard/intel/minnowmax/romstage.c b/src/mainboard/intel/minnowmax/romstage.c index 575e646862..460c668a9a 100644 --- a/src/mainboard/intel/minnowmax/romstage.c +++ b/src/mainboard/intel/minnowmax/romstage.c @@ -18,25 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include #include /** @@ -58,23 +40,19 @@ void get_func_disables(uint32_t *fd_mask, uint32_t *fd2_mask) } - /** * /brief mainboard call for setup that needs to be done after fsp init * */ - void late_mainboard_romstage_entry() { } - void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) { UPD_DATA_REGION *UpdData = FspRtBuffer->Common.UpdDataRgnPtr; - /* Disable 2nd DIMM */ UpdData->PcdMrcInitSPDAddr2 = 0x00; -- cgit v1.2.3