From a96e66a76f21c41b0c15db8d9df1d721f4a8a9af Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 11 Nov 2018 02:51:14 +0100 Subject: soc/intel: Clean mess around UART_DEBUG MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Everything is wrong here, the Kconfig symbols are only the tip of the iceberg. Based on Kconfig prompts the SoC code performed pad configu- rations! I don't see why the person who configures coreboot should have the board schematics at hand. As a mitigation, we remove the prompts for UART_DEBUG, which is renamed to INTEL_LPSS_UART_FOR_CONSOLE (because the former didn't really say what it's about), and for UART_FOR_CONSOLE in case the former is selec- ted. Change-Id: Ibe2ed3cab0bb04bb23989c22da45299f088c758b Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/29573 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/intel/leafhill/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/intel/leafhill') diff --git a/src/mainboard/intel/leafhill/Kconfig b/src/mainboard/intel/leafhill/Kconfig index 94d0493953..69bfde764f 100644 --- a/src/mainboard/intel/leafhill/Kconfig +++ b/src/mainboard/intel/leafhill/Kconfig @@ -5,7 +5,7 @@ config BOARD_SPECIFIC_OPTIONS select SOC_INTEL_APOLLOLAKE select BOARD_ROMSIZE_KB_16384 select HAVE_ACPI_TABLES - select UART_DEBUG + select INTEL_LPSS_UART_FOR_CONSOLE config MAINBOARD_DIR string @@ -24,7 +24,6 @@ config FMDFILE default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/leafhill.$(CONFIG_COREBOOT_ROMSIZE_KB).fmd" config UART_FOR_CONSOLE - int "Number of UART port to use for serial log" default 2 config NEED_IFWI -- cgit v1.2.3