From 028200f75f6d8d0f947d68f41ca10fbfe05f9283 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Tue, 4 Oct 2016 10:53:32 -0700 Subject: x86/acpi_device: Add support for GPIO output polarity Instead of hard-coding the polarity of the GPIO to active high/low, accept it as a parameter in devicetree. This polarity can then be used while calling into acpi_dp_add_gpio to determine the active low status correctly. BUG=chrome-os-partner:55988 BRANCH=None TEST=Verified that correct polarity is set for reset-gpio on reef. Change-Id: I4aba4bb8bd61799962deaaa11307c0c5be112919 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/16877 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/intel/kunimitsu/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/intel/kunimitsu') diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index a5789b0bcd..8dded98470 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -303,7 +303,7 @@ chip soc/intel/skylake device pci 1f.2 on end # Power Management Controller device pci 1f.3 on chip drivers/generic/max98357a - register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_E3)" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)" register "device_present_gpio" = "GPP_E3" register "device_present_gpio_invert" = "1" device generic 0 on end -- cgit v1.2.3