From 5ff7390fcd74fe1cd94d2507cf7c04b1c1eff620 Mon Sep 17 00:00:00 2001 From: Rizwan Qureshi Date: Wed, 24 Aug 2016 20:50:54 +0530 Subject: kunimitsu: Add FSP 2.0 support in romstage Populate mainboard related Memory Init Params i.e, SPD Rcomp values, DQ and DQs values. Change-Id: Id62c43a72a0e34fa2e8d177ce895d395418e2347 Signed-off-by: Rizwan Qureshi Signed-off-by: Naresh G Solanki Reviewed-on: https://review.coreboot.org/16316 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/intel/kunimitsu/spd/spd.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'src/mainboard/intel/kunimitsu/spd/spd.h') diff --git a/src/mainboard/intel/kunimitsu/spd/spd.h b/src/mainboard/intel/kunimitsu/spd/spd.h index cdff9ceacc..f53c9ec9fa 100644 --- a/src/mainboard/intel/kunimitsu/spd/spd.h +++ b/src/mainboard/intel/kunimitsu/spd/spd.h @@ -15,6 +15,10 @@ */ #ifndef MAINBOARD_SPD_H + +#include +#include "../gpio.h" + #define MAINBOARD_SPD_H #define SPD_LEN 256 @@ -33,4 +37,26 @@ #define HYNIX_SINGLE_CHAN 0x1 #define SAMSUNG_SINGLE_CHAN 0x4 #define MIC_SINGLE_CHAN 0x5 + +/* PCH_MEM_CFG[3:0] */ +#define MAX_MEMORY_CONFIG 0x10 +#define RCOMP_TARGET_PARAMS 0x5 +#define K4E6E304EE_MEM_ID 0x3 + +static inline int get_spd_index(void) { + /* PCH_MEM_CFG[3:0] */ + gpio_t spd_gpios[] = { + GPIO_MEM_CONFIG_0, + GPIO_MEM_CONFIG_1, + GPIO_MEM_CONFIG_2, + GPIO_MEM_CONFIG_3, + }; + return (gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios))); +} +void mainboard_fill_dq_map_data(void *dq_map_ptr); +void mainboard_fill_dqs_map_data(void *dqs_map_ptr); +void mainboard_fill_rcomp_res_data(void *rcomp_ptr); +void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr); +uintptr_t mainboard_get_spd_data(void); +int mainboard_has_dual_channel_mem(void); #endif -- cgit v1.2.3