From 5029a1668e0ca99ac64210967e22c971b0395efa Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Thu, 23 Mar 2017 23:41:53 -0700 Subject: ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID using chromeec Instead of defining a separate LID device for mainboards using chromeec, define EC_ENABLE_LID_SWITCH for these boards. Change-Id: Iac58847c2055fa27c19d02b2dbda6813d6dec3ec Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/18964 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Aaron Durbin --- src/mainboard/intel/kblrvp/acpi/ec.asl | 5 +++++ src/mainboard/intel/kblrvp/acpi/mainboard.asl | 13 ------------- 2 files changed, 5 insertions(+), 13 deletions(-) (limited to 'src/mainboard/intel/kblrvp') diff --git a/src/mainboard/intel/kblrvp/acpi/ec.asl b/src/mainboard/intel/kblrvp/acpi/ec.asl index 01fa75c6ff..a9a61ddc2c 100644 --- a/src/mainboard/intel/kblrvp/acpi/ec.asl +++ b/src/mainboard/intel/kblrvp/acpi/ec.asl @@ -23,6 +23,11 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) + +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + /* ACPI code for EC functions */ #include #endif diff --git a/src/mainboard/intel/kblrvp/acpi/mainboard.asl b/src/mainboard/intel/kblrvp/acpi/mainboard.asl index 4764372778..0041ee6e1d 100644 --- a/src/mainboard/intel/kblrvp/acpi/mainboard.asl +++ b/src/mainboard/intel/kblrvp/acpi/mainboard.asl @@ -14,22 +14,9 @@ * GNU General Public License for more details. */ -#include - #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Return (\_SB.PCI0.LPCB.EC0.LIDS) - } - - Name (_PRW, Package () { GPE_EC_WAKE, 5 }) - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) -- cgit v1.2.3