From 2dff4f0688f443034b53086a60c09bcedc9dc6c2 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Thu, 16 Nov 2023 01:17:31 +0100 Subject: mb/intel/kblrvp: Make use of chipset devicetree Use the references from the chipset devicetree as this makes the comments superfluous and remove devices which are turned off. Built all variants with BUILD_TIMELESS=1 and the resulting binaries remain the same. Change-Id: I1fd5f2a1c8adb5f379d7f3d0b54dca9c3ee6e2b3 Signed-off-by: Felix Singer Signed-off-by: Marvin Evers Reviewed-on: https://review.coreboot.org/c/coreboot/+/79325 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer --- .../intel/kblrvp/variants/rvp3/overridetree.cb | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'src/mainboard/intel/kblrvp/variants/rvp3') diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index 4a1c67b94a..b7c4395bd1 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -113,18 +113,18 @@ chip soc/intel/skylake }" device domain 0 on - device pci 05.0 on end # SA IMGU - device pci 14.3 on end # Camera - device pci 1c.0 on end # PCI Express Port 1 x4 SLOT1 - device pci 1c.4 on end # PCI Express Port 5 x1 SLOT2/LAN - device pci 1c.5 on end # PCI Express Port 6 x1 SLOT3 - device pci 1d.0 on end # PCI Express Port 9 x1 WLAN - device pci 1d.1 on end # PCI Express Port 10 x1 WIGIG - device pci 1f.0 on + device ref imgu on end + device ref cio on end + device ref pcie_rp1 on end # x4 SLOT1 + device ref pcie_rp5 on end # x1 SLOT2/LAN + device ref pcie_rp6 on end # x1 SLOT3 + device ref pcie_rp9 on end # x1 WLAN + device ref pcie_rp10 on end # x1 WIGIG + device ref lpc_espi on chip drivers/pc80/tpm device pnp 0c31.0 on end end - end # LPC Interface - device pci 1f.3 on end # Intel HDA + end + device ref hda on end end end -- cgit v1.2.3