From d6e00546a4cdce308a6a5480887ac03d94c3b826 Mon Sep 17 00:00:00 2001 From: Praveen hodagatta pranesh Date: Fri, 9 Nov 2018 18:15:24 +0800 Subject: mb/intel/kblrvp: Add new Kaby lake RVP11 support The RVP11 is a dual-channel DDR4 SO-DIMM on skylake H platform. This patch add following chages - Add overridetree.cb for RVP11 - Select skylake PCH-H chipset config for RVP11. - Add GPIO table as per board schematics. - Add audio verb table for RVP11. - Set the UserBd UPD to BOARD_TYPE_DESKTOP. BUG=None TEST= Build and flash, confirm boot into yocto OS on KBL RVP11 platform. verified PCI, USB, ethernet, SATA, display, audio and power functionalities. Signed-off-by: Praveen hodagatta pranesh Change-Id: Id86f56df06795601cc9d7830766e54396d218e00 Reviewed-on: https://review.coreboot.org/c/29809 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/mainboard/intel/kblrvp/ramstage.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/mainboard/intel/kblrvp/ramstage.c') diff --git a/src/mainboard/intel/kblrvp/ramstage.c b/src/mainboard/intel/kblrvp/ramstage.c index 1e6aa1141b..0b52f377be 100644 --- a/src/mainboard/intel/kblrvp/ramstage.c +++ b/src/mainboard/intel/kblrvp/ramstage.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2016 Intel Corporation + * Copyright (C) 2016-2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -32,6 +32,9 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) static void ioexpander_init(void *unused) { + if (IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP11)) + return; + printk(BIOS_DEBUG, "Programming TCA6424A I/O expander\n"); /* I/O Expander 1, Port 0 Data */ -- cgit v1.2.3