From 2c3054c14eed154abf10a504c05919aaf4db496e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 22 Nov 2016 20:21:49 +0530 Subject: soc/intel/skylake: Add USB Port Over Current (OC) Pin programming Program USB Overcurrent pins as per board schematics definition. BUG=none BRANCH=none TEST=Build and boot kunimitsu from USB device. Change-Id: I6aeb65953c753e09ad639469de7d866a54f42f11 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/17570 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Duncan Laurie --- src/mainboard/intel/kblrvp/devicetree.cb | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'src/mainboard/intel/kblrvp/devicetree.cb') diff --git a/src/mainboard/intel/kblrvp/devicetree.cb b/src/mainboard/intel/kblrvp/devicetree.cb index 11d5062664..c2dde4f526 100644 --- a/src/mainboard/intel/kblrvp/devicetree.cb +++ b/src/mainboard/intel/kblrvp/devicetree.cb @@ -168,23 +168,23 @@ chip soc/intel/skylake register "PcieRpClkReqNumber[9]" = "4" # USB 2.0 Enable all ports - register "usb2_ports[0]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[1]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[2]" = "USB2_PORT_MAX" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MAX" # Type-A Port - register "usb2_ports[5]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[6]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[7]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[8]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[9]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[10]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[11]" = "USB2_PORT_MAX" # TYPE-A Port + register "usb2_ports[0]" = "USB2_PORT_MAX(OC0)" # TYPE-A Port + register "usb2_ports[1]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port + register "usb2_ports[2]" = "USB2_PORT_MAX(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MAX(OC_SKIP)" # Type-A Port + register "usb2_ports[5]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port + register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[7]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[8]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[9]" = "USB2_PORT_MAX(OC1)" # TYPE-A Port + register "usb2_ports[10]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[11]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port # USB 3.0 Enable Port 1-4. Port 5 & 6 Disabled - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # TYPE-A Port - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # TYPE-A Port - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # TYPE-A Port - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # TYPE-A Port + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # TYPE-A Port + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # TYPE-A Port register "usb3_ports[4]" = "USB3_PORT_EMPTY" # Disabled register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Disabled -- cgit v1.2.3