From 258ceb75074ed47d221bad0a4ebae805deb185ed Mon Sep 17 00:00:00 2001 From: Maulik V Vaghela Date: Mon, 28 Sep 2020 19:36:56 +0530 Subject: mb/intel/jslrvp: Update PMC as hidden device This change allows treating the PMC as a 'hidden' PCI device on JasperLake, so that the MMIO & I/O resources can be exposed as belonging to this device, instead of the system agent and LPC/eSPI. Original patch for jasperlake SoC here: CB:42018 This change was missing for JasperLake rvp board. TEST=Checked PMC init function is called and also checked PCI resource for PMC device 1f.2. Change-Id: I7531d32c62d3f9735938f744f2892ab9c9bebddf Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/c/coreboot/+/45793 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Ronak Kanabar Reviewed-by: Subrata Banik --- src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/intel/jasperlake_rvp') diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index f8fea47aa5..fc96719643 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -466,7 +466,7 @@ chip soc/intel/jasperlake end # GSPI #1 device pci 1f.0 on end # eSPI Interface device pci 1f.1 on end # P2SB - device pci 1f.2 on end # Power Management Controller + device pci 1f.2 hidden end # Power Management Controller device pci 1f.3 on end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI -- cgit v1.2.3