From 630aa4b3db1b7fa459380ec52328d632b53b22de Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Fri, 6 Dec 2019 19:19:19 +0530 Subject: mb/intel/jasperlake_rvp: Add initial mainboard code This is a initial mainboard code aimed to serve as base for further mainboard check-ins. This is a copy patch from icelake_rvp as on commit ID: I64db2460115f5fb35ca197b83440f8ee47470761 Below are the changes done over the copy patch: 1. Rename "Icelake" with "Jasperlake". 2. Replace "icelake_rvp" with "jasperlake_rvp". 3. Rename "icl" with "jsl". 4. Remove unwanted SPD file, add empty SPD as placeholder. 5. Replace "soc/intel/icelake" with "soc/intel/tigerlake" as tigerlake SOC hosts jasperlake code as well. 6. Empty romstage_fsp_params.c, to fill it later with SOC specific config. 7. Empty GPIO configuration, to be filled as per board. 8. Change copyright year to 2019. 9. Add two board support namely BOARD_INTEL_JASPERLAKE_RVP and BOARD_INTEL_JASPERLAKE_RVP_EXT_EC 10. Replace icl_u and icl_y variant with jslrvp variant. 11. Remove basebord gpio.c and rely on variant override. 12. Remove HDA verb table and config support. Changes to follow on top of this: 1. Add correct memory parameters, add SPDs. 2. Clean up devicetree as per jasperlake SOC. 3. Add GPIO support. 4. Update chromeos.fmd to make 10MB BIOS region. TEST=Build jasperlake rvp board Change-Id: I3314215807959b7348b71933fbba98e6487c0632 Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/c/coreboot/+/37557 Tested-by: build bot (Jenkins) Reviewed-by: Rizwan Qureshi --- src/mainboard/intel/jasperlake_rvp/Kconfig | 53 ++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 src/mainboard/intel/jasperlake_rvp/Kconfig (limited to 'src/mainboard/intel/jasperlake_rvp/Kconfig') diff --git a/src/mainboard/intel/jasperlake_rvp/Kconfig b/src/mainboard/intel/jasperlake_rvp/Kconfig new file mode 100644 index 0000000000..97b038e45c --- /dev/null +++ b/src/mainboard/intel/jasperlake_rvp/Kconfig @@ -0,0 +1,53 @@ +if BOARD_INTEL_JASPERLAKE_RVP || BOARD_INTEL_JASPERLAKE_RVP_EXT_EC + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select DRIVERS_I2C_HID + select DRIVERS_I2C_GENERIC + select DRIVERS_USB_ACPI + select EC_ACPI + select GENERIC_SPD_BIN + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE + select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_USES_IFD_EC_REGION + select SOC_INTEL_JASPERLAKE + +config MAINBOARD_DIR + string + default "intel/jasperlake_rvp" + +config VARIANT_DIR + string + default "jslrvp" if BOARD_INTEL_JASPERLAKE_RVP || BOARD_INTEL_JASPERLAKE_RVP_EXT_EC + +config MAINBOARD_PART_NUMBER + string + default "blackwall" + +config MAINBOARD_FAMILY + string + default "Intel_jasperlake_rvp" + +config MAX_CPUS + int + default 8 + +config DEVICETREE + string + default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" + +config DIMM_SPD_SIZE + int + default 512 + +config VBOOT + select VBOOT_LID_SWITCH + select VBOOT_MOCK_SECDATA + +config UART_FOR_CONSOLE + int + default 2 +endif -- cgit v1.2.3