From 01f96d78ffdcf5b60079c5804ca99076cbda5d95 Mon Sep 17 00:00:00 2001 From: Sumeet Pawnikar Date: Mon, 19 Nov 2018 12:29:51 +0530 Subject: mb/intel/icelake_rvp: Enable dptf functionality Enable dptf functionality for IceLake based U and Y systems. Change-Id: I8ef396f9df8e39300d5870fd9a147ecdd6f0ba90 Signed-off-by: Sumeet Pawnikar Reviewed-on: https://review.coreboot.org/c/29686 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb | 3 +++ src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src/mainboard/intel/icelake_rvp') diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb index 0d2ea76f9a..6d7fad7623 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb @@ -157,6 +157,9 @@ chip soc/intel/icelake # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1" + # Enable DPTF + register "dptf_enable" = "1" + # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5" diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb index 62c7a828be..0972c29e12 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb @@ -157,6 +157,9 @@ chip soc/intel/icelake # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1" + # Enable DPTF + register "dptf_enable" = "1" + # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5" -- cgit v1.2.3