From faf7a8e8592f47dc9c92ab1672e30bbf60bc3581 Mon Sep 17 00:00:00 2001 From: Mariusz Szafranski Date: Wed, 2 Aug 2017 18:51:47 +0200 Subject: mainboard/intel/harcuvar: Add support for Intel Harcuvar CRB The Harcuvar CRB is a reference platform of Intel Atom C3000 SoC ("Denverton" and "Denverton-NS") for the communications segment/market. The MohonPeak coreboot was used as the starting template with additions/modifications from other Intel Apollo Lake/Skylake coreboot. Tested with TianoCore payload (UDK2015) and Poky (Yocto Project Reference Distro) 2.0 with kernel 4.1.8 booted from SATA drive and external USB pendrive. Change-Id: I088833e36e2d22d1fe1610b8dca1454092da511a Signed-off-by: Mariusz Szafranski Reviewed-on: https://review.coreboot.org/20862 Tested-by: build bot (Jenkins) Reviewed-by: FEI WANG --- src/mainboard/intel/harcuvar/spd/spd.c | 58 ++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 src/mainboard/intel/harcuvar/spd/spd.c (limited to 'src/mainboard/intel/harcuvar/spd/spd.c') diff --git a/src/mainboard/intel/harcuvar/spd/spd.c b/src/mainboard/intel/harcuvar/spd/spd.c new file mode 100644 index 0000000000..37f4424684 --- /dev/null +++ b/src/mainboard/intel/harcuvar/spd/spd.c @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 - 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +#include "spd.h" + +/* Get SPD data for on-board memory */ +uint8_t *mainboard_find_spd_data() +{ + uint8_t *spd_data; + int spd_index; + size_t spd_file_len; + char *spd_file; + + spd_index = 0; + + spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, + &spd_file_len); + if (!spd_file) + die("SPD data not found."); + + if (spd_file_len < ((spd_index + 1) * SPD_LEN)) { + printk(BIOS_ERR, + "SPD index override to 0 due to incorrect SPD index.\n"); + spd_index = 0; + } + + if (spd_file_len < SPD_LEN) + die("Missing SPD data."); + + /* Assume same memory in both channels */ + spd_index *= SPD_LEN; + spd_data = (uint8_t *)(spd_file + spd_index); + + /* Make sure a valid SPD was found */ + if (spd_data[0] == 0) + die("Invalid SPD data."); + + return spd_data; +} -- cgit v1.2.3