From faf7a8e8592f47dc9c92ab1672e30bbf60bc3581 Mon Sep 17 00:00:00 2001 From: Mariusz Szafranski Date: Wed, 2 Aug 2017 18:51:47 +0200 Subject: mainboard/intel/harcuvar: Add support for Intel Harcuvar CRB The Harcuvar CRB is a reference platform of Intel Atom C3000 SoC ("Denverton" and "Denverton-NS") for the communications segment/market. The MohonPeak coreboot was used as the starting template with additions/modifications from other Intel Apollo Lake/Skylake coreboot. Tested with TianoCore payload (UDK2015) and Poky (Yocto Project Reference Distro) 2.0 with kernel 4.1.8 booted from SATA drive and external USB pendrive. Change-Id: I088833e36e2d22d1fe1610b8dca1454092da511a Signed-off-by: Mariusz Szafranski Reviewed-on: https://review.coreboot.org/20862 Tested-by: build bot (Jenkins) Reviewed-by: FEI WANG --- src/mainboard/intel/harcuvar/acpi_tables.c | 61 ++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 src/mainboard/intel/harcuvar/acpi_tables.c (limited to 'src/mainboard/intel/harcuvar/acpi_tables.c') diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c new file mode 100644 index 0000000000..acbdb3091c --- /dev/null +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 The Chromium OS Authors. All rights reserved. + * Copyright (C) 2014 - 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +extern const unsigned char AmlCode[]; + +void acpi_create_gnvs(global_nvs_t *gnvs) +{ + acpi_init_gnvs(gnvs); + + /* Disable USB ports in S5 */ + gnvs->s5u0 = 0; + gnvs->s5u1 = 0; + + /* TPM Present */ + gnvs->tpmp = 0; +} + +unsigned long acpi_fill_madt(unsigned long current) +{ + /* Local APICs */ + current = acpi_create_madt_lapics(current); + + /* IOAPIC */ + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 2, + IO_APIC_ADDR, 0); + + current = acpi_madt_irq_overrides(current); + + return current; +} -- cgit v1.2.3