From 66c210ae3790feb11e89e2d6353f1ce26966d5b9 Mon Sep 17 00:00:00 2001 From: Julien Viard de Galbert Date: Mon, 6 Nov 2017 13:16:30 +0100 Subject: mainboard/intel/harcuvar: update to set the HSIO lines configuration Change-Id: Ifc3423ff983fb631edcab087d04742937b25ef86 Signed-off-by: Julien Viard de Galbert Reviewed-on: https://review.coreboot.org/22310 Reviewed-by: FEI WANG Tested-by: build bot (Jenkins) --- src/mainboard/intel/harcuvar/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/intel/harcuvar/Makefile.inc') diff --git a/src/mainboard/intel/harcuvar/Makefile.inc b/src/mainboard/intel/harcuvar/Makefile.inc index ba88569c8a..d100688fe0 100644 --- a/src/mainboard/intel/harcuvar/Makefile.inc +++ b/src/mainboard/intel/harcuvar/Makefile.inc @@ -2,6 +2,7 @@ ## This file is part of the coreboot project. ## ## Copyright (C) 2014 - 2017 Intel Corporation. +## Copyright (C) 2017 Online SAS. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -16,9 +17,11 @@ subdirs-$(CONFIG_ENABLE_FSP_MEMORY_DOWN) += spd romstage-y += boardid.c +romstage-y += hsio.c ramstage-y += ramstage.c ramstage-y += boardid.c +ramstage-y += hsio.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c -- cgit v1.2.3