From 735779cc9aa9d6b02fadbdfc0a50fb087cce7731 Mon Sep 17 00:00:00 2001 From: Cole Nelson Date: Thu, 18 May 2017 15:39:22 -0700 Subject: mainboard/intel/glkrvp: configure RAPL PL1 for GLK Sets RAPL PL1 power to ~6W. Note: 7.5W setting gives a run-time 6W actual measured power. Tested on GLK w/kernel 4.11.0 by reading MSR 0x610 at runtime and comparing to measured power on an instrumented board. Change-Id: I07caeb2895a579387025d3b0fb7f1d2c3d5e2665 Signed-off-by: Cole Nelson Reviewed-on: https://review.coreboot.org/19746 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/mainboard/intel/glkrvp') diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index 640a17d54d..e8eb3f35ac 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -55,10 +55,8 @@ chip soc/intel/apollolake # Enable DPTF register "dptf_enable" = "1" - # PL1 override 12000 mW: the energy calculation is wrong with the - # current VR solution. Experiments show that SoC TDP max (6W) can - # be reached when RAPL PL1 is set to 12W. - register "tdp_pl1_override_mw" = "12000" + # PL1 override: 7.5W setting gives a run-time 6W actual + register "tdp_pl1_override_mw" = "7500" # Set RAPL PL2 to 15W. register "tdp_pl2_override_mw" = "15000" -- cgit v1.2.3