From 57779955c9be64426e591557fe8571637028ddad Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Thu, 19 May 2022 15:35:31 +0100 Subject: soc/intel/apollolake: Hook Up SataPortEnable to devicetree Hook Up SataPortsEnable to the devicetree. As the default value is 0, set both [0] and [1] in all mainboards so they aren't affected. Signed-off-by: Sean Rhodes Change-Id: Ica8cf9484a6e6fe4362eabb8a9a59fcaf97c1bd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64524 Reviewed-by: Nico Huber Reviewed-by: Werner Zeh Tested-by: build bot (Jenkins) --- src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/mainboard/intel/glkrvp/variants') diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index f025d1fd0a..6ab391e36b 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -124,7 +124,10 @@ chip soc/intel/apollolake device pci 0f.1 on end # - Heci2 device pci 0f.2 on end # - Heci3 device pci 11.0 off end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "SataPortsEnable[0]" = "1" + register "SataPortsEnable[1]" = "1" + end device pci 13.0 off end # - PCIe-A 0 Slot 1 device pci 13.1 off end # - PCIe-A 1 device pci 13.2 off end # - PCIe-A 2 Onboard Lan -- cgit v1.2.3