From 7427abce07fb80289646b7653242022182b9e8f9 Mon Sep 17 00:00:00 2001 From: Hannah Williams Date: Tue, 20 Jun 2017 14:31:44 -0700 Subject: mainboard/intel/glkrvp: Add support for audio This patch adds the below: 1) Add correct SSP endpoint config for spk and headset 2) Update GPIO config for jack detection 3) Update GPIO config for I2S pins TEST=sound card binds TEST=cross checked SSDT entries from /sys/firmware/acpi/tables/ TEST=Jack interrupt works Change-Id: I32022ddacd79917730080889c040f842e0c9e6b9 Signed-off-by: Hannah Williams Signed-off-by: Sathyanarayana Nujella Reviewed-on: https://review.coreboot.org/19799 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- .../intel/glkrvp/variants/baseboard/devicetree.cb | 36 +++++++++++++++++++--- 1 file changed, 32 insertions(+), 4 deletions(-) (limited to 'src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb') diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index e8eb3f35ac..4b939473bd 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -80,8 +80,12 @@ chip soc/intel/apollolake register "gpe0_dw2" = "PMC_GPE_N_95_64" register "gpe0_dw3" = "PMC_GPE_NW_31_0" - # Enable I2C2 bus early for TPM access - register "i2c[2].early_init" = "1" + # Enable I2C0 for audio codec at 400kHz + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .rise_time_ns = 104, + .fall_time_ns = 52, + }" # Minimum SLP S3 assertion width 28ms. register "slp_s3_assertion_width_usecs" = "28000" @@ -97,7 +101,13 @@ chip soc/intel/apollolake device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI device pci 0d.3 on end # - Shared SRAM - device pci 0e.0 on end # - Audio + device pci 0e.0 on # - Audio + chip drivers/generic/max98357a + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_160)" + register "sdmode_delay" = "5" + device generic 0 on end + end + end device pci 0f.0 on end # - Heci1 device pci 0f.1 on end # - Heci2 device pci 0f.2 on end # - Heci3 @@ -111,7 +121,25 @@ chip soc/intel/apollolake device pci 14.1 on end # - PCIe-B 1 Onboard M2 Slot(Wifi/BT) device pci 15.0 on end # - XHCI device pci 15.1 off end # - XDCI - device pci 16.0 on end # - I2C 0 + device pci 16.0 on # - I2C 0 + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_20_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end device pci 16.1 off end # - I2C 1 device pci 16.2 off end # - I2C 2 device pci 16.3 off end # - I2C 3 -- cgit v1.2.3