From b17f3d3d3cdd215edcff492699c744a4c85908d0 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Thu, 24 Oct 2019 00:19:45 +0200 Subject: soc,mb/intel: clean up remaining FSP2.0 socs/boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove CONFIG_...FSP2.0 based if-switches from FSP2.0-only socs/boards Change-Id: Iae92dc2e2328b14c78ac686aaf326bd68430933b Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36279 Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/intel/galileo/Kconfig | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/intel/galileo/Kconfig') diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig index 7e1742d0f9..37f88dd8f0 100644 --- a/src/mainboard/intel/galileo/Kconfig +++ b/src/mainboard/intel/galileo/Kconfig @@ -23,7 +23,6 @@ config BOARD_SPECIFIC_OPTIONS select SOC_INTEL_QUARK select MAINBOARD_HAS_I2C_TPM_ATMEL select MAINBOARD_HAS_TPM2 - select PLATFORM_USES_FSP2_0 select UDK_2015_BINDING @@ -103,7 +102,6 @@ config FSP_DEBUG_ALL Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA also turn on FSP 2.0 debug support for ESRAM_LAYOUT, FSP_CALLS_AND_STATUS, FSP_HEADER, POSTCAR_CONSOLE and VERIFY_HOBS - or FSP 1.1 DISPLAY_FSP_ENTRY_POINTS config VBOOT_WITH_CRYPTO_SHIELD bool "Verified boot using the Crypto Shield board" -- cgit v1.2.3