From c4b6f3bacb7a2ac139f8b85c85388ef6fbda96d9 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Tue, 5 Nov 2013 17:47:37 -0700 Subject: emeraldlake2: Clean up COM port enable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove the COM port enable loop. There is no need to search for the port when it is needed and known by the GPIO function. Change-Id: Ie4e533fd9e49ed9ae62b209317b4b9853ff9926a Signed-off-by: Marc Jones Reviewed-on: http://review.coreboot.org/4027 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/mainboard/intel/emeraldlake2/romstage.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) (limited to 'src/mainboard/intel/emeraldlake2') diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 7691116276..363299df4b 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -42,31 +42,29 @@ #include #endif +#define SIO_PORT 0x164e + static void pch_enable_lpc(void) { device_t dev = PCH_LPC_DEV; - int i; /* Set COM1/COM2 decode range */ pci_write_config16(dev, LPC_IO_DEC, 0x0010); - /* Enable SuperIO + COM1 + PS/2 Keyboard/Mouse */ - u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN | KBC_LPC_EN; + /* Enable SuperIO + PS/2 Keyboard/Mouse */ + u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN; pci_write_config16(dev, LPC_EN, lpc_config); /* Map 256 bytes at 0x1600 to the LPC bus. */ pci_write_config32(dev, LPC_GEN1_DEC, 0xfc1601); - /* Map a range for the runtime registers to the LPC bus. */ + /* Map a range for the runtime_port registers to the LPC bus. */ pci_write_config32(dev, LPC_GEN2_DEC, 0xc0181); - for (i = 0; i < ARRAY_SIZE(sio1007_lpc_ports); i++) { - if (sio1007_enable_uart_at(sio1007_lpc_ports[i])) { - /* Keep COMA UART enable bit on. */ - pci_write_config16(dev, LPC_EN, - lpc_config | COMA_LPC_EN); - break; - } + /* Enable COM1 */ + if (sio1007_enable_uart_at(SIO_PORT)) { + pci_write_config16(dev, LPC_EN, + lpc_config | COMA_LPC_EN); } } @@ -132,7 +130,7 @@ static void early_pch_init(void) static void setup_sio_gpios(void) { - const u16 port = 0x164e; + const u16 port = SIO_PORT; const u16 runtime_port = 0x180; /* Turn on configuration mode. */ -- cgit v1.2.3