From ab96ce66593eb215bf08cb1a1d3b2758c8ece7eb Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 15 Jun 2018 19:49:41 +0200 Subject: mb/intel/dg41wv: Expose some SIO devices via ACPI Change-Id: Ia658c117434c3fae45bbbe6c472ca58ba4f1a117 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/27120 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Felix Held --- src/mainboard/intel/dg41wv/acpi/superio.asl | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) (limited to 'src/mainboard/intel/dg41wv') diff --git a/src/mainboard/intel/dg41wv/acpi/superio.asl b/src/mainboard/intel/dg41wv/acpi/superio.asl index 2997587d82..8b4a3cb0cb 100644 --- a/src/mainboard/intel/dg41wv/acpi/superio.asl +++ b/src/mainboard/intel/dg41wv/acpi/superio.asl @@ -1 +1,28 @@ -/* dummy */ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#undef SUPERIO_DEV +#undef SUPERIO_PNP_BASE +#undef W83627DHG_SHOW_UARTA +#undef W83627DHG_SHOW_UARTB +#undef W83627DHG_SHOW_KBC +#undef W83627DHG_SHOW_PS2M +#undef W83627DHG_SHOW_HWMON +#define SUPERIO_DEV SIO0 +#define SUPERIO_PNP_BASE 0x2e +#define W83627DHG_SHOW_UARTA +#define W83627DHG_SHOW_UARTB +#define W83627DHG_SHOW_KBC +#define W83627DHG_SHOW_PS2M +#define W83627DHG_SHOW_HWMON +#include -- cgit v1.2.3