From b0e8c7c43799109b2147a02ebd1210e88beafd64 Mon Sep 17 00:00:00 2001
From: Marc Jones <marcjones@sysproconsulting.com>
Date: Thu, 23 Jul 2020 11:54:38 -0600
Subject: soc/intel/xeon_sp: Use common ASL code for xeon_sp

Move and use the common xeon_sp/cpx/acpi asl for skx/.
There were only minor whitespace differences between the directories.

Update the mainboards to build the moved files.

TiogaPass coreboot.rom checked with BUILD_TIMELESS.

Change-Id: I5058a3fe8d96075a266fb92f10707bb94308c85b
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45217
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/intel/cedarisland_crb/dsdt.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/intel/cedarisland_crb')

diff --git a/src/mainboard/intel/cedarisland_crb/dsdt.asl b/src/mainboard/intel/cedarisland_crb/dsdt.asl
index 407ee37624..72a0ec1d04 100644
--- a/src/mainboard/intel/cedarisland_crb/dsdt.asl
+++ b/src/mainboard/intel/cedarisland_crb/dsdt.asl
@@ -21,7 +21,7 @@ DefinitionBlock(
 	{
 		Device (PCI0)
 		{
-			#include <soc/intel/xeon_sp/cpx/acpi/southcluster.asl>
+			#include <soc/intel/xeon_sp/acpi/southcluster.asl>
 			#include <soc/intel/common/block/acpi/acpi/lpc.asl>
 
 		}
-- 
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