From 1b325dd971c84d75aa5a53405c11e0ad8f2517b9 Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Fri, 20 Mar 2020 12:12:12 -0700 Subject: mb/intel/cedarisland_crb: Add Cedar Island CRB Just a minimal set of board files needed to get it to boot in 1 CPU mode. Signed-off-by: Andrey Petrov Change-Id: Ie2f944964e938d8026a6d5d8a22a8449199d08aa Reviewed-on: https://review.coreboot.org/c/coreboot/+/39714 Tested-by: build bot (Jenkins) Reviewed-by: Maxim Polyakov Reviewed-by: Angel Pons --- .../intel/cedarisland_crb/acpi/platform.asl | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 src/mainboard/intel/cedarisland_crb/acpi/platform.asl (limited to 'src/mainboard/intel/cedarisland_crb/acpi/platform.asl') diff --git a/src/mainboard/intel/cedarisland_crb/acpi/platform.asl b/src/mainboard/intel/cedarisland_crb/acpi/platform.asl new file mode 100644 index 0000000000..75c1b92f1e --- /dev/null +++ b/src/mainboard/intel/cedarisland_crb/acpi/platform.asl @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +/* The APM port can be used for generating software SMIs */ + +OperationRegion (APMP, SystemIO, 0xb2, 2) +Field (APMP, ByteAcc, NoLock, Preserve) +{ + APMC, 8, // APM command + APMS, 8 // APM status +} + +/* Port 80 POST */ + +OperationRegion (POST, SystemIO, 0x80, 1) +Field (POST, ByteAcc, Lock, Preserve) +{ + DBG0, 8 +} + +Name(\APC1, Zero) // IIO IOAPIC + +Name(\PICM, Zero) // IOAPIC/8259 + +Method(_PIC, 1) +{ + Store(Arg0, PICM) +} + +/* + * The _PTS method (Prepare To Sleep) is called before the OS is + * entering a sleep state. The sleep state number is passed in Arg0 + */ + +Method(_PTS,1) +{ +} + +/* The _WAK method is called on system wakeup */ + +Method(_WAK,1) +{ + Return(Package(){0,0}) +} -- cgit v1.2.3