From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/intel/bayleybay_fsp/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/intel/bayleybay_fsp/romstage.c') diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c index c34d82fde1..0b8c16b702 100644 --- a/src/mainboard/intel/bayleybay_fsp/romstage.c +++ b/src/mainboard/intel/bayleybay_fsp/romstage.c @@ -163,7 +163,7 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) UpdData->AzaliaConfigPtr = (UINT32)&mainboard_AzaliaConfig; /* Disable 2nd DIMM on Bakersport*/ -#if IS_ENABLED(CONFIG_BOARD_INTEL_BAKERSPORT_FSP) +#if CONFIG(BOARD_INTEL_BAKERSPORT_FSP) UpdData->PcdMrcInitSPDAddr2 = 0x00; /* cannot use SPD_ADDR_DISABLED at this point */ #endif } -- cgit v1.2.3