From cbf1a0fec8b84dc936a35428b835501ad0f46a30 Mon Sep 17 00:00:00 2001 From: Divya Sasidharan Date: Mon, 8 Feb 2016 09:45:37 -0800 Subject: mainboard/amenia: Enable Chrome EC Interface/Keyboard Enabled LPC channel between host and EC. Superio.asl will enable proper probing of onboard keyboard. Change-Id: I57014fc90b345661853280ae3402f86e56af5fb9 Signed-off-by: Divya Sasidharan Signed-off-by: Freddy Paul Reviewed-on: https://review.coreboot.org/14468 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/intel/amenia/acpi/superio.asl | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 src/mainboard/intel/amenia/acpi/superio.asl (limited to 'src/mainboard/intel/amenia/acpi/superio.asl') diff --git a/src/mainboard/intel/amenia/acpi/superio.asl b/src/mainboard/intel/amenia/acpi/superio.asl new file mode 100644 index 0000000000..db14d178da --- /dev/null +++ b/src/mainboard/intel/amenia/acpi/superio.asl @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015-2016 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* mainboard configuration */ +#include "../ec.h" + +#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources +#define SIO_EC_HOST_ENABLE // EC Host Interface Resources +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + +/* ACPI code for EC SuperIO functions */ +#include -- cgit v1.2.3