From ceee6d87ca8a4a95d78c1f5221ac90cacc7cf55b Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 17 Nov 2020 23:53:50 +0530 Subject: mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics HPD_1: A19 -> E14 HPD_2: A20 -> A18 Change-Id: Idf3c8f4931bf8364bb9216a9369df7e05dcde047 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/47683 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/intel/adlrvp/gpio.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/intel/adlrvp') diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index 039a437a1a..a44d4ac43d 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -277,9 +277,9 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2), PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2), - /* HPD_1 (A19) and HPD_2 (A20) pins */ - PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), - PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), + /* HPD_1 (E14) and HPD_2 (A18) pins */ + PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* IMGCLKOUT */ PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1), -- cgit v1.2.3