From 50f8b4ebdd7db8077b87ab7686637599c9d93af3 Mon Sep 17 00:00:00 2001 From: Sugnan Prabhu S Date: Thu, 18 Mar 2021 22:08:22 +0530 Subject: soc/intel/alderlake: Add enum for HDA audio configuration This change adds an enum to configure the audio related UPDs used for configuring the audio over HDMI/DP and rename a variable for better readability. TEST=On shadowmountain audio sound cards are detected and listed by the Linux kernel. Audio playback and capture is working fine. Change-Id: I2834d6f4ce1651a609c5563af375f6e365d931fa Signed-off-by: Sugnan Prabhu S Reviewed-on: https://review.coreboot.org/c/coreboot/+/51658 Tested-by: build bot (Jenkins) Reviewed-by: EricR Lai Reviewed-by: Angel Pons Reviewed-by: Furquan Shaikh --- src/mainboard/intel/adlrvp/devicetree.cb | 9 +++------ src/mainboard/intel/adlrvp/devicetree_m.cb | 9 +++------ 2 files changed, 6 insertions(+), 12 deletions(-) (limited to 'src/mainboard/intel/adlrvp') diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index 39453d9806..cf9861f63a 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -171,12 +171,9 @@ chip soc/intel/alderlake # HD Audio register "PchHdaDspEnable" = "1" - # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T - register "PchHdaIDispLinkTmode" = "2" - # iDisp-Link Freq 4: 96MHz, 3: 48MHz. - register "PchHdaIDispLinkFrequency" = "4" - # Not disconnected/enumerable - register "PchHdaIDispCodecDisconnect" = "0" + register "PchHdaIDispLinkTmode" = "HDA_TMODE_4T" + register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" + register "PchHdaIDispCodecEnable" = "1" register "CnviBtAudioOffload" = "true" diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index 30aee7a7fc..1e618dd1d8 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -121,12 +121,9 @@ chip soc/intel/alderlake # HD Audio register "PchHdaDspEnable" = "1" - # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T - register "PchHdaIDispLinkTmode" = "3" - # iDisp-Link Freq 4: 96MHz, 3: 48MHz. - register "PchHdaIDispLinkFrequency" = "4" - # Not disconnected/enumerable - register "PchHdaIDispCodecDisconnect" = "0" + register "PchHdaIDispLinkTmode" = "HDA_TMODE_8T" + register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" + register "PchHdaIDispCodecEnable" = "1" # Intel Common SoC Config register "common_soc_config" = "{ -- cgit v1.2.3