From f333ba09580c00a6f27e3ee0796431f5df936ecf Mon Sep 17 00:00:00 2001
From: Edwin Beasant <edwin_beasant@virtensys.com>
Date: Thu, 10 Jun 2010 15:24:57 +0000
Subject: This commit updates the Geode LX GLCP delay control setup from the v2
 way to the v3 way. This resolves problems with terminated DRAM modules.
 Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Acked-by: Roland
 G. Minnich <rminnich@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/mainboard/iei')

diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index b41b82ba7c..35d16eaac2 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -19,6 +19,7 @@
  */
 
 #include <stdint.h>
+#include <stdlib.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -92,7 +93,7 @@ void main(unsigned long bist)
 
 	pll_reset(ManualConf);
 
-	cpuRegInit();
+	cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
 
 	sdram_initialize(1, memctrl);
 
-- 
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