From 98402455c5a21cc8de9d5d51f7e6dd0c1b7df76e Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 8 Oct 2009 14:31:56 +0000 Subject: More kconfig: AMD LX AMD SC520 boards by iei, pcengines, technexion, technologic, thomson Signed-off-by: Patrick Georgi Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/iei/Kconfig | 1 + src/mainboard/iei/pcisa-lx-800-r10/Kconfig | 49 +++++++++++++++++++++++++ src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc | 31 ++++++++++++++++ 3 files changed, 81 insertions(+) create mode 100644 src/mainboard/iei/pcisa-lx-800-r10/Kconfig create mode 100644 src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc (limited to 'src/mainboard/iei') diff --git a/src/mainboard/iei/Kconfig b/src/mainboard/iei/Kconfig index f12c202e13..9f3dd10f99 100644 --- a/src/mainboard/iei/Kconfig +++ b/src/mainboard/iei/Kconfig @@ -24,6 +24,7 @@ choice source "src/mainboard/iei/juki-511p/Kconfig" source "src/mainboard/iei/nova4899r/Kconfig" +source "src/mainboard/iei/pcisa-lx-800-r10/Kconfig" endchoice diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig new file mode 100644 index 0000000000..abfb0b622c --- /dev/null +++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig @@ -0,0 +1,49 @@ +config BOARD_IEI_PCISA_LX_800_R10 + bool "PCISA lx-800 r10" + select ARCH_X86 + select CPU_AMD_LX + select NORTHBRIDGE_AMD_LX + select SOUTHBRIDGE_AMD_CS5536 + select SUPERIO_WINBOND_W83627HF + select HAVE_PIRQ_TABLE + select PIRQ_ROUTE + select UDELAY_TSC + select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 + select USE_DCACHE_RAM + select USE_PRINTK_IN_CAR + +config MAINBOARD_DIR + string + default iei/pcisa-lx-800-r10 + depends on BOARD_IEI_PCISA_LX_800_R10 + +config MAINBOARD_PART_NUMBER + string + default "PCISALX800R10" + depends on BOARD_IEI_PCISA_LX_800_R10 + +config HAVE_OPTION_TABLE + bool + default n + depends on BOARD_IEI_PCISA_LX_800_R10 + +config IRQ_SLOT_COUNT + int + default 9 + depends on BOARD_IEI_PCISA_LX_800_R10 + +config DCACHE_RAM_BASE + hex + default 0xc8000 + depends on BOARD_IEI_PCISA_LX_800_R10 + +config DCACHE_RAM_SIZE + hex + default 0x8000 + depends on BOARD_IEI_PCISA_LX_800_R10 + +config RAMBASE + hex + default 0x4000 + depends on BOARD_IEI_PCISA_LX_800_R10 + diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc b/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc new file mode 100644 index 0000000000..eac4755d28 --- /dev/null +++ b/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc @@ -0,0 +1,31 @@ +driver-y += mainboard.o + +# Needed by irq_tables and mptable and acpi_tables. +obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o + +# This is part of the conversion to init-obj and away from included code. + +initobj-y += crt0.o +# FIXME in $(top)/Makefile +crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc +crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc +crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc +crt0-y += ../../../../src/cpu/amd/model_lx/cache_as_ram.inc +crt0-y += auto.inc + +ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb +ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds +ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds +ldscript-y += ../../../../src/arch/i386/lib/failover.lds + +ifdef POST_EVALUATION + +$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@ + perl -e 's/\.rodata/.rom.data/g' -pi $@ + perl -e 's/\.text/.section .rom.text/g' -pi $@ + +endif + -- cgit v1.2.3