From 7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 21 Nov 2010 22:47:22 +0000 Subject: Simplify a few code chunks, fix whitespace and indentation. Also, remove some less useful comments, some dead code / unused functions. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/iei/juki-511p/romstage.c | 7 ------- src/mainboard/iei/kino-780am2-fam10/romstage.c | 18 +++++------------- src/mainboard/iei/nova4899r/romstage.c | 8 -------- src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 6 ------ 4 files changed, 5 insertions(+), 34 deletions(-) (limited to 'src/mainboard/iei') diff --git a/src/mainboard/iei/juki-511p/romstage.c b/src/mainboard/iei/juki-511p/romstage.c index 96e027872a..6bde6756c4 100644 --- a/src/mainboard/iei/juki-511p/romstage.c +++ b/src/mainboard/iei/juki-511p/romstage.c @@ -36,12 +36,9 @@ static void main(unsigned long bist) { - /* Initialize the serial console. */ w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); - - /* Halt if there was a built in self test failure. */ report_bist_failure(bist); /* Disable Watchdog Timer. */ @@ -49,10 +46,6 @@ static void main(unsigned long bist) inb(0x843); cs5530_enable_rom(); - - /* Initialize RAM. */ sdram_init(); - - /* Check RAM. */ /* ram_check(0x00000000, 640 * 1024); */ } diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index eb88647384..5afa651e05 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -25,9 +25,6 @@ #define FAM10_SCAN_PCI_BUS 0 #define FAM10_ALLOCATE_IO_RANGE 0 -/* UART address and device number */ -#define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1) - #include #include #include @@ -55,15 +52,13 @@ static int smbus_read_byte(u32 device, u32 address); #include "southbridge/amd/sb700/sb700_early_setup.c" #include "northbridge/amd/amdfam10/debug.c" -static void activate_spd_rom(const struct mem_controller *ctrl) -{ -} +#define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1) + +static void activate_spd_rom(const struct mem_controller *ctrl) { } static int spd_read_byte(u32 device, u32 address) { - int result; - result = smbus_read_byte(device, address); - return result; + return smbus_read_byte(device, address); } #include "northbridge/amd/amdfam10/amdfam10.h" @@ -81,11 +76,9 @@ static int spd_read_byte(u32 device, u32 address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; - u32 bsp_apicid = 0; - u32 val; + u32 bsp_apicid = 0, val; msr_t msr; if (!cpu_init_detectedx && boot_cpu()) { @@ -94,7 +87,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* mov bsp to bus 0xff when > 8 nodes */ set_bsp_node_CHtExtNodeCfgEn(); enumerate_ht_chain(); - sb700_pci_port80(); } diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c index 72f35aae3f..0900f4ba3e 100644 --- a/src/mainboard/iei/nova4899r/romstage.c +++ b/src/mainboard/iei/nova4899r/romstage.c @@ -36,19 +36,11 @@ static void main(unsigned long bist) { - /* Initialize the serial console. */ w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); - - /* Halt if there was a built in self test failure. */ report_bist_failure(bist); - cs5530_enable_rom(); - - /* Initialize RAM. */ sdram_init(); - - /* Check RAM. */ /* ram_check(0x00000000, 640 * 1024); */ } diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index e889eed09c..4e27f9bbbd 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -58,11 +58,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/model_lx/syspreinit.c" #include "cpu/amd/model_lx/msrinit.c" -static void mb_gpio_init(void) -{ - /* Early mainboard specific GPIO setup. */ -} - void main(unsigned long bist) { post_code(0x01); @@ -80,7 +75,6 @@ void main(unsigned long bist) * early MSR setup for CS5536. */ w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - mb_gpio_init(); uart_init(); console_init(); -- cgit v1.2.3