From 885c289bba6554545ae21896a318f71e4ccb16a8 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 3 Oct 2016 17:16:48 +0200 Subject: nb/intel/i945: Make pci_mmio_size a devicetree parameter Instead of hardcoding pci_mmio_size in the raminit code, this makes it a parameter in the devicetree. A safe minimum of 768M is also defined since using anything less causes problems (if 4G of ram is used). Change-Id: If004c861464162d5dbbc61836a3a205d1619dfd5 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/16856 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/ibase/mb899/devicetree.cb | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard/ibase/mb899') diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb index 77ceaddc52..c63e5d645f 100644 --- a/src/mainboard/ibase/mb899/devicetree.cb +++ b/src/mainboard/ibase/mb899/devicetree.cb @@ -9,6 +9,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port -- cgit v1.2.3