From fa5d0f835b1f3bb8907e616913cbf7b91d09ef26 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 12 Nov 2019 19:11:50 +0100 Subject: nb/intel/sandybridge: Set up console in bootblock Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/hp/2570p/Makefile.inc | 2 + src/mainboard/hp/2570p/early_init.c | 56 +++++++++++++++++ src/mainboard/hp/2570p/romstage.c | 55 ----------------- src/mainboard/hp/2760p/Makefile.inc | 2 + src/mainboard/hp/2760p/early_init.c | 56 +++++++++++++++++ src/mainboard/hp/2760p/romstage.c | 55 ----------------- src/mainboard/hp/8460p/Makefile.inc | 2 + src/mainboard/hp/8460p/early_init.c | 59 ++++++++++++++++++ src/mainboard/hp/8460p/romstage.c | 58 ----------------- src/mainboard/hp/8470p/Makefile.inc | 2 + src/mainboard/hp/8470p/early_init.c | 58 +++++++++++++++++ src/mainboard/hp/8470p/romstage.c | 57 ----------------- src/mainboard/hp/8770w/Makefile.inc | 2 + src/mainboard/hp/8770w/early_init.c | 61 ++++++++++++++++++ src/mainboard/hp/8770w/romstage.c | 60 ------------------ .../hp/compaq_8200_elite_sff/Makefile.inc | 2 + .../hp/compaq_8200_elite_sff/early_init.c | 61 ++++++++++++++++++ src/mainboard/hp/compaq_8200_elite_sff/romstage.c | 60 ------------------ src/mainboard/hp/folio_9470m/Makefile.inc | 2 + src/mainboard/hp/folio_9470m/early_init.c | 56 +++++++++++++++++ src/mainboard/hp/folio_9470m/romstage.c | 55 ----------------- src/mainboard/hp/revolve_810_g1/Makefile.inc | 2 + src/mainboard/hp/revolve_810_g1/early_init.c | 72 ++++++++++++++++++++++ src/mainboard/hp/revolve_810_g1/romstage.c | 71 --------------------- src/mainboard/hp/z220_sff_workstation/Makefile.inc | 2 + src/mainboard/hp/z220_sff_workstation/early_init.c | 61 ++++++++++++++++++ src/mainboard/hp/z220_sff_workstation/romstage.c | 60 ------------------ 27 files changed, 558 insertions(+), 531 deletions(-) create mode 100644 src/mainboard/hp/2570p/early_init.c delete mode 100644 src/mainboard/hp/2570p/romstage.c create mode 100644 src/mainboard/hp/2760p/early_init.c delete mode 100644 src/mainboard/hp/2760p/romstage.c create mode 100644 src/mainboard/hp/8460p/early_init.c delete mode 100644 src/mainboard/hp/8460p/romstage.c create mode 100644 src/mainboard/hp/8470p/early_init.c delete mode 100644 src/mainboard/hp/8470p/romstage.c create mode 100644 src/mainboard/hp/8770w/early_init.c delete mode 100644 src/mainboard/hp/8770w/romstage.c create mode 100644 src/mainboard/hp/compaq_8200_elite_sff/early_init.c delete mode 100644 src/mainboard/hp/compaq_8200_elite_sff/romstage.c create mode 100644 src/mainboard/hp/folio_9470m/early_init.c delete mode 100644 src/mainboard/hp/folio_9470m/romstage.c create mode 100644 src/mainboard/hp/revolve_810_g1/early_init.c delete mode 100644 src/mainboard/hp/revolve_810_g1/romstage.c create mode 100644 src/mainboard/hp/z220_sff_workstation/early_init.c delete mode 100644 src/mainboard/hp/z220_sff_workstation/romstage.c (limited to 'src/mainboard/hp') diff --git a/src/mainboard/hp/2570p/Makefile.inc b/src/mainboard/hp/2570p/Makefile.inc index 4fbf73bbd3..1d258758be 100644 --- a/src/mainboard/hp/2570p/Makefile.inc +++ b/src/mainboard/hp/2570p/Makefile.inc @@ -17,3 +17,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/2570p/early_init.c b/src/mainboard/hp/2570p/early_init.c new file mode 100644 index 0000000000..226367a569 --- /dev/null +++ b/src/mainboard/hp/2570p/early_init.c @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, + { 0, 1, 0 }, + { 1, 1, 1 }, + { 1, 1, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, /* bluetooth */ + { 0, 0, 3 }, + { 1, 0, 3 }, /* smartcard */ + { 1, 1, 4 }, + { 1, 1, 4 }, /* mainboard USB 2.0 */ + { 1, 0, 5 }, /* camera */ + { 0, 0, 5 }, + { 1, 0, 6 }, /* WWAN */ + { 0, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); + kbc1126_disable4e(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c deleted file mode 100644 index f1d1e905f3..0000000000 --- a/src/mainboard/hp/2570p/romstage.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Iru Cai - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, - { 0, 1, 0 }, - { 1, 1, 1 }, - { 1, 1, 1 }, - { 1, 0, 2 }, - { 1, 0, 2 }, /* bluetooth */ - { 0, 0, 3 }, - { 1, 0, 3 }, /* smartcard */ - { 1, 1, 4 }, - { 1, 1, 4 }, /* mainboard USB 2.0 */ - { 1, 0, 5 }, /* camera */ - { 0, 0, 5 }, - { 1, 0, 6 }, /* WWAN */ - { 0, 0, 6 }, -}; - -void mainboard_config_superio(void) -{ - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); - kbc1126_disable4e(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/hp/2760p/Makefile.inc b/src/mainboard/hp/2760p/Makefile.inc index 4fbf73bbd3..1d258758be 100644 --- a/src/mainboard/hp/2760p/Makefile.inc +++ b/src/mainboard/hp/2760p/Makefile.inc @@ -17,3 +17,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/2760p/early_init.c b/src/mainboard/hp/2760p/early_init.c new file mode 100644 index 0000000000..98806de9f4 --- /dev/null +++ b/src/mainboard/hp/2760p/early_init.c @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, + { 1, 1, 0 }, + { 1, 1, 1 }, + { 1, 1, 1 }, + { 1, 0, 2 }, + { 1, 1, 2 }, + { 0, 0, 3 }, + { 1, 0, 3 }, + { 1, 1, 4 }, + { 1, 0, 4 }, + { 0, 0, 5 }, + { 1, 1, 5 }, + { 0, 0, 6 }, + { 1, 1, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_com1_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); + kbc1126_disable4e(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/2760p/romstage.c b/src/mainboard/hp/2760p/romstage.c deleted file mode 100644 index acf5b1895a..0000000000 --- a/src/mainboard/hp/2760p/romstage.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Iru Cai - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, - { 1, 1, 0 }, - { 1, 1, 1 }, - { 1, 1, 1 }, - { 1, 0, 2 }, - { 1, 1, 2 }, - { 0, 0, 3 }, - { 1, 0, 3 }, - { 1, 1, 4 }, - { 1, 0, 4 }, - { 0, 0, 5 }, - { 1, 1, 5 }, - { 0, 0, 6 }, - { 1, 1, 6 }, -}; - -void mainboard_config_superio(void) -{ - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_com1_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); - kbc1126_disable4e(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/hp/8460p/Makefile.inc b/src/mainboard/hp/8460p/Makefile.inc index 4fbf73bbd3..1d258758be 100644 --- a/src/mainboard/hp/8460p/Makefile.inc +++ b/src/mainboard/hp/8460p/Makefile.inc @@ -17,3 +17,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/8460p/early_init.c b/src/mainboard/hp/8460p/early_init.c new file mode 100644 index 0000000000..9c2a4b1139 --- /dev/null +++ b/src/mainboard/hp/8460p/early_init.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* USB0, eSATA */ + { 1, 0, 0 }, /* USB charger */ + { 0, 1, 1 }, + { 1, 1, 1 }, /* camera */ + { 1, 0, 2 }, /* USB4 expresscard */ + { 1, 0, 2 }, /* bluetooth */ + { 0, 0, 3 }, + { 1, 0, 3 }, /* smartcard */ + { 1, 1, 4 }, /* fingerprint */ + { 1, 1, 4 }, /* WWAN */ + { 1, 0, 5 }, /* CONN */ + { 1, 0, 5 }, /* docking */ + { 1, 0, 6 }, /* CONN */ + { 1, 0, 6 }, /* docking */ +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c deleted file mode 100644 index 4e4b175366..0000000000 --- a/src/mainboard/hp/8460p/romstage.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Iru Cai - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, /* USB0, eSATA */ - { 1, 0, 0 }, /* USB charger */ - { 0, 1, 1 }, - { 1, 1, 1 }, /* camera */ - { 1, 0, 2 }, /* USB4 expresscard */ - { 1, 0, 2 }, /* bluetooth */ - { 0, 0, 3 }, - { 1, 0, 3 }, /* smartcard */ - { 1, 1, 4 }, /* fingerprint */ - { 1, 1, 4 }, /* WWAN */ - { 1, 0, 5 }, /* CONN */ - { 1, 0, 5 }, /* docking */ - { 1, 0, 6 }, /* CONN */ - { 1, 0, 6 }, /* docking */ -}; - -void mainboard_config_superio(void) -{ - lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/hp/8470p/Makefile.inc b/src/mainboard/hp/8470p/Makefile.inc index 4fbf73bbd3..1d258758be 100644 --- a/src/mainboard/hp/8470p/Makefile.inc +++ b/src/mainboard/hp/8470p/Makefile.inc @@ -17,3 +17,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/8470p/early_init.c b/src/mainboard/hp/8470p/early_init.c new file mode 100644 index 0000000000..8dbe15815d --- /dev/null +++ b/src/mainboard/hp/8470p/early_init.c @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, + { 1, 1, 0 }, + { 1, 1, 1 }, + { 1, 1, 1 }, + { 1, 0, 2 }, + { 0, 0, 2 }, + { 0, 0, 3 }, + { 1, 0, 3 }, + { 1, 1, 4 }, + { 1, 1, 4 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 }, + { 1, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/8470p/romstage.c b/src/mainboard/hp/8470p/romstage.c deleted file mode 100644 index 8c9b29ef01..0000000000 --- a/src/mainboard/hp/8470p/romstage.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Iru Cai - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, - { 1, 1, 0 }, - { 1, 1, 1 }, - { 1, 1, 1 }, - { 1, 0, 2 }, - { 0, 0, 2 }, - { 0, 0, 3 }, - { 1, 0, 3 }, - { 1, 1, 4 }, - { 1, 1, 4 }, - { 1, 0, 5 }, - { 1, 0, 5 }, - { 1, 0, 6 }, - { 1, 0, 6 }, -}; - -void mainboard_config_superio(void) -{ - lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/hp/8770w/Makefile.inc b/src/mainboard/hp/8770w/Makefile.inc index 910d6a6191..f4b387abed 100644 --- a/src/mainboard/hp/8770w/Makefile.inc +++ b/src/mainboard/hp/8770w/Makefile.inc @@ -15,3 +15,5 @@ bootblock-y += gpio.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/8770w/early_init.c b/src/mainboard/hp/8770w/early_init.c new file mode 100644 index 0000000000..3bd2ed7f51 --- /dev/null +++ b/src/mainboard/hp/8770w/early_init.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai + * Copyright (C) 2018 Robert Reeves + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* Dock USB3.0 */ + { 1, 1, 0 }, /* Conn */ + { 1, 1, 1 }, /* USB 3.0 */ + { 1, 1, 1 }, /* USB 3.0 */ + { 1, 0, 2 }, /* Express Card */ + { 1, 0, 2 }, /* Bluetooth */ + { 0, 0, 3 }, + { 1, 0, 3 }, /* Smart Card */ + { 1, 1, 4 }, /* Fingerprint Reader */ + { 1, 1, 4 }, /* Conn (Charger) */ + { 1, 0, 5 }, /* Camera */ + { 1, 0, 5 }, /* Dock */ + { 1, 0, 6 }, /* WWAN */ + { 1, 0, 6 }, /* Conn (eSATA Combo) */ +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[1], 0x51, id_only); + read_spd(&spd[2], 0x52, id_only); + read_spd(&spd[3], 0x53, id_only); +} diff --git a/src/mainboard/hp/8770w/romstage.c b/src/mainboard/hp/8770w/romstage.c deleted file mode 100644 index 8eefe4d6a2..0000000000 --- a/src/mainboard/hp/8770w/romstage.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Iru Cai - * Copyright (C) 2018 Robert Reeves - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, /* Dock USB3.0 */ - { 1, 1, 0 }, /* Conn */ - { 1, 1, 1 }, /* USB 3.0 */ - { 1, 1, 1 }, /* USB 3.0 */ - { 1, 0, 2 }, /* Express Card */ - { 1, 0, 2 }, /* Bluetooth */ - { 0, 0, 3 }, - { 1, 0, 3 }, /* Smart Card */ - { 1, 1, 4 }, /* Fingerprint Reader */ - { 1, 1, 4 }, /* Conn (Charger) */ - { 1, 0, 5 }, /* Camera */ - { 1, 0, 5 }, /* Dock */ - { 1, 0, 6 }, /* WWAN */ - { 1, 0, 6 }, /* Conn (eSATA Combo) */ -}; - -void mainboard_config_superio(void) -{ - lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} diff --git a/src/mainboard/hp/compaq_8200_elite_sff/Makefile.inc b/src/mainboard/hp/compaq_8200_elite_sff/Makefile.inc index af2b6742f0..f0b34f9840 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/Makefile.inc +++ b/src/mainboard/hp/compaq_8200_elite_sff/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/compaq_8200_elite_sff/early_init.c b/src/mainboard/hp/compaq_8200_elite_sff/early_init.c new file mode 100644 index 0000000000..882a604899 --- /dev/null +++ b/src/mainboard/hp/compaq_8200_elite_sff/early_init.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * Copyright (C) 2018 Patrick Rudolph + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, + { 1, 0, -1 }, +}; + +void bootblock_mainboard_early_init(void) +{ + if (CONFIG(CONSOLE_SERIAL)) + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + /* BTX mainboard: Reversed mapping */ + read_spd(&spd[3], 0x50, id_only); + read_spd(&spd[2], 0x51, id_only); + read_spd(&spd[1], 0x52, id_only); + read_spd(&spd[0], 0x53, id_only); +} diff --git a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c deleted file mode 100644 index df581fe542..0000000000 --- a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2014 Vladimir Serbinenko - * Copyright (C) 2018 Patrick Rudolph - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, - { 1, 0, -1 }, -}; - -void mainboard_config_superio(void) -{ - if (CONFIG(CONSOLE_SERIAL)) - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - /* BTX mainboard: Reversed mapping */ - read_spd(&spd[3], 0x50, id_only); - read_spd(&spd[2], 0x51, id_only); - read_spd(&spd[1], 0x52, id_only); - read_spd(&spd[0], 0x53, id_only); -} diff --git a/src/mainboard/hp/folio_9470m/Makefile.inc b/src/mainboard/hp/folio_9470m/Makefile.inc index 4fbf73bbd3..1d258758be 100644 --- a/src/mainboard/hp/folio_9470m/Makefile.inc +++ b/src/mainboard/hp/folio_9470m/Makefile.inc @@ -17,3 +17,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/folio_9470m/early_init.c b/src/mainboard/hp/folio_9470m/early_init.c new file mode 100644 index 0000000000..e5a1892023 --- /dev/null +++ b/src/mainboard/hp/folio_9470m/early_init.c @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* SSP1: dock */ + { 1, 1, 0 }, /* SSP2: left, EHCI Debug */ + { 1, 1, 1 }, /* SSP3: right back side */ + { 1, 1, 1 }, /* SSP4: right front side */ + { 1, 0, 2 }, /* B0P5 */ + { 1, 0, 2 }, /* B0P6: wlan USB */ + { 0, 0, 3 }, /* B0P7 */ + { 1, 1, 3 }, /* B0P8: smart card reader */ + { 1, 1, 4 }, /* B1P1: fingerprint reader */ + { 0, 0, 4 }, /* B1P2: (EHCI Debug, not connected) */ + { 1, 1, 5 }, /* B1P3: Camera */ + { 0, 0, 5 }, /* B1P4 */ + { 1, 1, 6 }, /* B1P5: wwan USB */ + { 0, 0, 6 }, /* B1P6 */ +}; + +void bootblock_mainboard_early_init(void) +{ + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/folio_9470m/romstage.c b/src/mainboard/hp/folio_9470m/romstage.c deleted file mode 100644 index 07ee1eb283..0000000000 --- a/src/mainboard/hp/folio_9470m/romstage.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2014 Vladimir Serbinenko - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, /* SSP1: dock */ - { 1, 1, 0 }, /* SSP2: left, EHCI Debug */ - { 1, 1, 1 }, /* SSP3: right back side */ - { 1, 1, 1 }, /* SSP4: right front side */ - { 1, 0, 2 }, /* B0P5 */ - { 1, 0, 2 }, /* B0P6: wlan USB */ - { 0, 0, 3 }, /* B0P7 */ - { 1, 1, 3 }, /* B0P8: smart card reader */ - { 1, 1, 4 }, /* B1P1: fingerprint reader */ - { 0, 0, 4 }, /* B1P2: (EHCI Debug, not connected) */ - { 1, 1, 5 }, /* B1P3: Camera */ - { 0, 0, 5 }, /* B1P4 */ - { 1, 1, 6 }, /* B1P5: wwan USB */ - { 0, 0, 6 }, /* B1P6 */ -}; - -void mainboard_config_superio(void) -{ - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/hp/revolve_810_g1/Makefile.inc b/src/mainboard/hp/revolve_810_g1/Makefile.inc index 574f56e107..0a15c42fdd 100644 --- a/src/mainboard/hp/revolve_810_g1/Makefile.inc +++ b/src/mainboard/hp/revolve_810_g1/Makefile.inc @@ -20,3 +20,5 @@ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads # FIXME: Other varients with same size onboard ram may exist. SPD_SOURCES = hynix_4g +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/revolve_810_g1/early_init.c b/src/mainboard/hp/revolve_810_g1/early_init.c new file mode 100644 index 0000000000..b464ce3daa --- /dev/null +++ b/src/mainboard/hp/revolve_810_g1/early_init.c @@ -0,0 +1,72 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +void mainboard_late_rcba_config(void) +{ + RCBA32(BUC) = 0x00000000; +} + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, + { 1, 0, 0 }, + { 1, 1, 1 }, + { 0, 1, 1 }, + { 0, 0, 2 }, + { 1, 0, 2 }, + { 0, 0, 3 }, + { 0, 0, 3 }, + { 1, 0, 4 }, /* B1P1: Digitizer */ + { 1, 0, 4 }, /* B1P2: wlan USB, EHCI debug */ + { 1, 1, 5 }, /* B1P3: Camera */ + { 0, 0, 5 }, /* B1P4 */ + { 1, 0, 6 }, /* B1P5: wwan USB */ + { 0, 0, 6 }, /* B1P6 */ +}; + +void bootblock_mainboard_early_init(void) +{ + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + /* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */ + size_t spd_file_len = 0; + void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, + &spd_file_len); + + if (!spd_file || spd_file_len < sizeof(spd_raw_data)) + die("SPD data for C1S0 not found."); + + read_spd(&spd[0], 0x50, id_only); + memcpy(&spd[2], spd_file, spd_file_len); +} diff --git a/src/mainboard/hp/revolve_810_g1/romstage.c b/src/mainboard/hp/revolve_810_g1/romstage.c deleted file mode 100644 index 24247420ab..0000000000 --- a/src/mainboard/hp/revolve_810_g1/romstage.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2014 Vladimir Serbinenko - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -void mainboard_late_rcba_config(void) -{ - RCBA32(BUC) = 0x00000000; -} - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, - { 1, 0, 0 }, - { 1, 1, 1 }, - { 0, 1, 1 }, - { 0, 0, 2 }, - { 1, 0, 2 }, - { 0, 0, 3 }, - { 0, 0, 3 }, - { 1, 0, 4 }, /* B1P1: Digitizer */ - { 1, 0, 4 }, /* B1P2: wlan USB, EHCI debug */ - { 1, 1, 5 }, /* B1P3: Camera */ - { 0, 0, 5 }, /* B1P4 */ - { 1, 0, 6 }, /* B1P5: wwan USB */ - { 0, 0, 6 }, /* B1P6 */ -}; - -void mainboard_config_superio(void) -{ - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - /* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */ - size_t spd_file_len = 0; - void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, - &spd_file_len); - - if (!spd_file || spd_file_len < sizeof(spd_raw_data)) - die("SPD data for C1S0 not found."); - - read_spd(&spd[0], 0x50, id_only); - memcpy(&spd[2], spd_file, spd_file_len); -} diff --git a/src/mainboard/hp/z220_sff_workstation/Makefile.inc b/src/mainboard/hp/z220_sff_workstation/Makefile.inc index af2b6742f0..f0b34f9840 100644 --- a/src/mainboard/hp/z220_sff_workstation/Makefile.inc +++ b/src/mainboard/hp/z220_sff_workstation/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/z220_sff_workstation/early_init.c b/src/mainboard/hp/z220_sff_workstation/early_init.c new file mode 100644 index 0000000000..fd70690079 --- /dev/null +++ b/src/mainboard/hp/z220_sff_workstation/early_init.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * Copyright (C) 2018 Patrick Rudolph + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 1, 5 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 7 }, + { 1, 0, 7 }, +}; + +void bootblock_mainboard_early_init(void) +{ + if (CONFIG(CONSOLE_SERIAL)) + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + /* BTX mainboard: Reversed mapping */ + read_spd(&spd[3], 0x50, id_only); + read_spd(&spd[2], 0x51, id_only); + read_spd(&spd[1], 0x52, id_only); + read_spd(&spd[0], 0x53, id_only); +} diff --git a/src/mainboard/hp/z220_sff_workstation/romstage.c b/src/mainboard/hp/z220_sff_workstation/romstage.c deleted file mode 100644 index 0b9ffe4d56..0000000000 --- a/src/mainboard/hp/z220_sff_workstation/romstage.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2014 Vladimir Serbinenko - * Copyright (C) 2018 Patrick Rudolph - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 1, 5 }, - { 1, 0, 5 }, - { 1, 0, 5 }, - { 1, 0, 5 }, - { 1, 0, 7 }, - { 1, 0, 7 }, -}; - -void mainboard_config_superio(void) -{ - if (CONFIG(CONSOLE_SERIAL)) - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - /* BTX mainboard: Reversed mapping */ - read_spd(&spd[3], 0x50, id_only); - read_spd(&spd[2], 0x51, id_only); - read_spd(&spd[1], 0x52, id_only); - read_spd(&spd[0], 0x53, id_only); -} -- cgit v1.2.3