From 6f74bc60281c26cc5c92c1b6f4bc3a27d76b9331 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 20 Nov 2023 21:17:00 +0100 Subject: mb/hp/280_g2: Restore comments documenting root port devices While transitioning the devicetree to make use of the chipset devicetree, commit 3b5b9f4c543c ("mb/hp/280_g2: Make use of the chipset devicetree") removed useful comments documenting the endpoints of the root ports. Restore them. Change-Id: I178cb472a8f40baaccc30514689bda2730dfa9dc Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/79153 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/hp/280_g2/devicetree.cb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/hp') diff --git a/src/mainboard/hp/280_g2/devicetree.cb b/src/mainboard/hp/280_g2/devicetree.cb index d6c8bc03e5..3b25a42581 100644 --- a/src/mainboard/hp/280_g2/devicetree.cb +++ b/src/mainboard/hp/280_g2/devicetree.cb @@ -64,12 +64,14 @@ chip soc/intel/skylake end device ref uart2 on end device ref pcie_rp5 on + # IT8893E PCI Bridge register "PcieRpEnable[4]" = "1" register "PcieRpLtrEnable[4]" = "1" register "PcieRpAdvancedErrorReporting[4]" = "1" register "PcieRpClkSrcNumber[4]" = "11" end device ref pcie_rp6 on + # PCIe x1 slot register "PcieRpEnable[5]" = "1" register "PcieRpHotPlug[5]" = "1" register "PcieRpLtrEnable[5]" = "1" @@ -77,12 +79,14 @@ chip soc/intel/skylake register "PcieRpClkSrcNumber[5]" = "6" end device ref pcie_rp7 on + # RTL8111 GbE NIC register "PcieRpEnable[6]" = "1" register "PcieRpLtrEnable[6]" = "1" register "PcieRpAdvancedErrorReporting[6]" = "1" register "PcieRpClkSrcNumber[6]" = "10" end device ref pcie_rp8 on + # M.2 2230 slot register "PcieRpEnable[7]" = "1" register "PcieRpHotPlug[7]" = "1" register "PcieRpLtrEnable[7]" = "1" -- cgit v1.2.3