From ffdb6e87c81559d6a41fde1a35e154cc4716639e Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 4 Mar 2017 07:48:27 +0200 Subject: hp/pavilion_m6_1035dx: Switch away from AGESA_LEGACY MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Iffc176522e943c003e2625d8e15341b281a261eb Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/20720 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c | 35 ++++++++++++---------- 1 file changed, 20 insertions(+), 15 deletions(-) (limited to 'src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c') diff --git a/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c b/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c index 605c7d3f9c..d5a0b51b81 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c @@ -17,7 +17,7 @@ #include "AGESA.h" #include "amdlib.h" -#include +#include #include #include @@ -140,6 +140,13 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = { }, }; +void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) +{ + FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface; + FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchReset->Xhci1Enable = FALSE; +} + /*---------------------------------------------------------------------------------------*/ /** * OemCustomizeInitEarly @@ -156,7 +163,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = { **/ /*---------------------------------------------------------------------------------------*/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr; @@ -188,14 +195,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) PcieComplexListPtr->DdiLinkList = DdiList; InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr; - return AGESA_SUCCESS; -} - -static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) -{ - /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ - InitMid->GnbMidConfiguration.iGpuVgaMode = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -210,7 +209,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) * If PlatformSpecificTable is populated, AGESA will base its settings on the * data from the table. Otherwise, it will use its default conservative settings */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), @@ -222,7 +221,13 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, - .InitMid = OemInitMid, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} + +void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid) +{ + /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ + InitMid->GnbMidConfiguration.iGpuVgaMode = 0; +} -- cgit v1.2.3