From f2e42c4a8ec75c162251c72df8ac3da12e8a3eb9 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 19 Nov 2019 15:55:05 +0100 Subject: mb/*/*: Drop AMDFAM10 mainboards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: Ic00ca18de3d73a17041a3a2839307149ad7902b2 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36961 Reviewed-by: Kyösti Mälkki Reviewed-by: Angel Pons Reviewed-by: HAOUAS Elyes Tested-by: build bot (Jenkins) --- src/mainboard/hp/dl165_g6_fam10/bootblock.c | 69 ----------------------------- 1 file changed, 69 deletions(-) delete mode 100644 src/mainboard/hp/dl165_g6_fam10/bootblock.c (limited to 'src/mainboard/hp/dl165_g6_fam10/bootblock.c') diff --git a/src/mainboard/hp/dl165_g6_fam10/bootblock.c b/src/mainboard/hp/dl165_g6_fam10/bootblock.c deleted file mode 100644 index b70b0a3e24..0000000000 --- a/src/mainboard/hp/dl165_g6_fam10/bootblock.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -#define SCH4307_CONFIG_PORT 0x162e -static inline void shc4307_enter_ext_func_mode(pnp_devfn_t dev) -{ - unsigned int port = dev >> 8; - outb(0x55, port); -} - -static inline void shc4307_exit_ext_func_mode(pnp_devfn_t dev) -{ - unsigned int port = dev >> 8; - outb(0xaa, port); -} - -#define CMOS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x6) -#define KBD_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x7) -#define DBG_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x3) -#define REGS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0xa) - -/* FIXME: This appears to be a super-io initialisation, - * placed in the mainboard directory. - */ -void shc4307_init(void) -{ - shc4307_enter_ext_func_mode(CMOS_DEV); - pnp_set_logical_device(CMOS_DEV); /* CMOS/RTC */ - pnp_set_iobase(CMOS_DEV, PNP_IDX_IO0, 0x70); - pnp_set_iobase(CMOS_DEV, PNP_IDX_IO1, 0x72); - pnp_set_irq(CMOS_DEV, PNP_IDX_IRQ0, 8); - /* pnp_set_enable(CMOS_DEV, 3); */ - pnp_write_config(CMOS_DEV, 0x30, 3); - - pnp_set_logical_device(KBD_DEV); /* Keyboard */ - pnp_set_irq(KBD_DEV, PNP_IDX_IRQ0, 1); - pnp_set_enable(KBD_DEV, 1); - - pnp_set_logical_device(DBG_DEV); /* Debug */ - pnp_set_iobase(DBG_DEV, PNP_IDX_IO0, 0x80); - pnp_set_enable(DBG_DEV, 1); - - pnp_set_logical_device(REGS_DEV); - pnp_set_iobase(REGS_DEV, PNP_IDX_IO0, 0x600); - pnp_set_enable(REGS_DEV, 1); - - shc4307_exit_ext_func_mode(CMOS_DEV); -} - -static void bootblock_mainboard_init(void) -{ - bootblock_northbridge_init(); - bootblock_southbridge_init(); - shc4307_init(); -} -- cgit v1.2.3