From 64829161111ea833453df8479d1bada1f91ee511 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 21 May 2020 15:29:17 +0200 Subject: AGESA f16kb: Factor out default MTRR settings All AGESA f16kb boards use the same MTRR values. Factor them out, while still allowing a board to override them via BLDCFG. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: I236e9d45505e92027acc3ba5ff496f5e2f09b9f3 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41665 Tested-by: build bot (Jenkins) Reviewed-by: Mike Banon --- src/mainboard/hp/abm/buildOpts.c | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'src/mainboard/hp/abm') diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c index 919096843b..8efd0a2b8c 100644 --- a/src/mainboard/hp/abm/buildOpts.c +++ b/src/mainboard/hp/abm/buildOpts.c @@ -197,24 +197,6 @@ // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG FALSE // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG FALSE -CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] = -{ - { AMD_AP_MTRR_FIX64k_00000, 0x1E1E1E1E1E1E1E1E }, - { AMD_AP_MTRR_FIX16k_80000, 0x1E1E1E1E1E1E1E1E }, - { AMD_AP_MTRR_FIX16k_A0000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_C0000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_C8000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_D0000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_D8000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_E0000, 0x1818181818181818 }, - { AMD_AP_MTRR_FIX4k_E8000, 0x1818181818181818 }, - { AMD_AP_MTRR_FIX4k_F0000, 0x1818181818181818 }, - { AMD_AP_MTRR_FIX4k_F8000, 0x1818181818181818 }, - { CPU_LIST_TERMINAL } -}; - -#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList - /* Include the files that instantiate the configuration definitions. */ #include "cpuRegisters.h" #include "cpuFamRegisters.h" -- cgit v1.2.3