From c2ce370f30b60daf60e23182cf01eb898d35fbbd Mon Sep 17 00:00:00 2001 From: Idwer Vollering Date: Sun, 5 Jan 2020 01:44:25 +0100 Subject: src/mainboard: remove MMIO macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This touches several mainboards. Replace the macro with C functions. The presence of bootblock.c is assumed. Change-Id: I583034ef0b0ed3e5a5e3dd680c57728ec5efbc8f Signed-off-by: Idwer Vollering Reviewed-on: https://review.coreboot.org/c/coreboot/+/37738 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/hp/abm/romstage.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) (limited to 'src/mainboard/hp/abm/romstage.c') diff --git a/src/mainboard/hp/abm/romstage.c b/src/mainboard/hp/abm/romstage.c index d7322c9eee..079bd7b786 100644 --- a/src/mainboard/hp/abm/romstage.c +++ b/src/mainboard/hp/abm/romstage.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -25,8 +26,7 @@ void board_BeforeAgesa(struct sysinfo *cb) { - u32 *addr32; - u32 t32; + u32 reg32; /* For serial port option, plug-in card on LPC. */ pci_devfn_t dev = PCI_DEV(0, 0x14, 3); @@ -47,17 +47,15 @@ void board_BeforeAgesa(struct sysinfo *cb) /* Set auxiliary output clock frequency on OSCOUT1 pin to be 25MHz */ /* Set auxiliary output clock frequency on OSCOUT2 pin to be 48MHz */ - addr32 = (u32 *)0xfed80e28; - t32 = *addr32; - t32 &= 0xffc0ffff; // Clr bits [21:19] & [18:16] - t32 |= 0x00010000; // Set bit 16 for 25MHz - *addr32 = t32; + reg32 = misc_read32(0x28); + reg32 &= 0xffc0ffff; // Clr bits [21:19] & [18:16] + reg32 |= 0x00010000; // Set bit 16 for 25MHz + misc_write32(0x28, reg32); /* Enable Auxiliary OSCOUT1/OSCOUT2 */ - addr32 = (u32 *)0xfed80e40; - t32 = *addr32; - t32 &= 0xffffff7b; // clear 2, 7 - *addr32 = t32; + reg32 = misc_read32(0x40; + reg32 &= 0xffffff7b; // clear 2, 7 + misc_write32(0x40, reg32); nct5104d_enable_uartd(SERIAL_DEV); nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -- cgit v1.2.3