From a0a3eab36d04b6fa96b900493b1b1d0d2837c20a Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 1 Jan 2020 20:52:11 +0100 Subject: mb/hp/*/devicetree.cb: Inherit the subsystemid Since all the `subsystemid` lines in these devicetrees use the same values, factor them out via inheritance. There are some exceptions though. There are some enabled devices which lack a `subsystemid` entry. Looks like HP uses the same subsystem ID on every device, so assume that these devices should also use that subsystem ID as well. While we are at it, tidy up all the now-empty device blocks. Change-Id: Iccd74fff9456e1204735a80ecc4f7685624cb78e Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/38081 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/hp/8770w/devicetree.cb | 98 +++++++++++------------------------- 1 file changed, 30 insertions(+), 68 deletions(-) (limited to 'src/mainboard/hp/8770w/devicetree.cb') diff --git a/src/mainboard/hp/8770w/devicetree.cb b/src/mainboard/hp/8770w/devicetree.cb index 0a30de287b..a9096c564a 100644 --- a/src/mainboard/hp/8770w/devicetree.cb +++ b/src/mainboard/hp/8770w/devicetree.cb @@ -29,16 +29,14 @@ chip northbridge/intel/sandybridge end end device domain 0x0 on - device pci 00.0 on # Host bridge - subsystemid 0x103c 0x176c - end - device pci 01.0 on # PCIe Bridge for discrete graphics - device pci 00.0 on end # GPU - device pci 00.1 on end # HDMI Audio on GPU - end - device pci 02.0 off # Internal graphics VGA controller - subsystemid 0x103c 0x176c + subsystemid 0x103c 0x176c inherit + + device pci 00.0 on end # Host bridge + device pci 01.0 on # PCIe Bridge for discrete graphics + device pci 00.0 on end # GPU + device pci 00.1 on end # HDMI Audio on GPU end + device pci 02.0 off end # Internal graphics VGA controller chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH register "c2_latency" = "0x0065" @@ -56,59 +54,28 @@ chip northbridge/intel/sandybridge register "superspeed_capable_ports" = "0x0000000f" register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_switchable_ports" = "0x0000000f" - register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0" - device pci 14.0 on # USB 3.0 Controller - subsystemid 0x103c 0x176c - end - device pci 16.0 on # Management Engine Interface 1 - subsystemid 0x103c 0x176c - end - device pci 16.1 off # Management Engine Interface 2 - end - device pci 16.2 off # Management Engine IDE-R - end - device pci 16.3 off # Management Engine KT - end - device pci 19.0 on # Intel Gigabit Ethernet - subsystemid 0x103c 0x176c - end - device pci 1a.0 on # USB2 EHCI #2 - subsystemid 0x103c 0x176c - end - device pci 1b.0 on # High Definition Audio Audio controller - subsystemid 0x103c 0x176c - end - device pci 1c.0 on # PCIe Port #1 - subsystemid 0x103c 0x176c - end - device pci 1c.1 on # PCIe Port #2 - subsystemid 0x103c 0x176c - end - device pci 1c.2 on # Media Card and FireWire host controller - subsystemid 0x103c 0x176c - end - device pci 1c.3 on # Wireless LAN Adapter - subsystemid 0x103c 0x176c - end - device pci 1c.4 on # SATA Controller 2 for dock - subsystemid 0x103c 0x176c - end - device pci 1c.5 off # PCIe Port #6 - end - device pci 1c.6 off # PCIe Port #7 - end - device pci 1c.7 off # PCIe Port #8 - end - device pci 1d.0 on # USB2 EHCI #1 - subsystemid 0x103c 0x176c - end - device pci 1e.0 off # PCI bridge - end - device pci 1f.0 on # LPC bridge PCI-LPC bridge - subsystemid 0x103c 0x176c + device pci 14.0 on end # USB 3.0 Controller + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 on end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # High Definition Audio Audio controller + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 on end # PCIe Port #2 + device pci 1c.2 on end # Media Card and FireWire host controller + device pci 1c.3 on end # Wireless LAN Adapter + device pci 1c.4 on end # SATA Controller 2 for dock + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 off end # PCIe Port #7 + device pci 1c.7 off end # PCIe Port #8 + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on # LPC bridge PCI-LPC bridge chip ec/hp/kbc1126 register "ec_data_port" = "0x62" register "ec_cmd_port" = "0x66" @@ -129,15 +96,10 @@ chip northbridge/intel/sandybridge end end #chip superio/smsc/lpc47n217 end - device pci 1f.2 on # SATA Controller 1 - subsystemid 0x103c 0x176c - end - device pci 1f.3 off # SMBus - end - device pci 1f.5 off # SATA Controller 2 - end - device pci 1f.6 off # Thermal - end + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 off end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal end end end -- cgit v1.2.3