From e21866781f73dfa468ce5da3db7e86b39e2bb4d8 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Wed, 29 Jul 2020 23:20:52 +0200 Subject: soc/intel/skylake: Enable CIO depending on devicetree configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently, CIO gets enabled by the option Cio2Enable, but this duplicates the devicetree on/off options. Therefore, depend on the devicetree for the enablement of the CIO controller. All corresponding mainboards were checked if the devicetree configuration matches the Cio2Enable setting, and missing entries were added. Change-Id: I65e2cceb65add66e3cb3de7071b1a3cc967ab291 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/44032 Reviewed-by: Arthur Heymans Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/mainboard/google/eve/devicetree.cb | 2 +- src/mainboard/google/fizz/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/glados/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/atlas/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nami/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/rammus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/soraka/devicetree.cb | 2 +- 10 files changed, 10 insertions(+), 10 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 8d15e8e50d..b42d917a3d 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -42,7 +42,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -295,6 +294,7 @@ chip soc/intel/skylake end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""WCOM50C1"" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index e8412d5ce0..5faf760ac9 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -73,7 +73,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -376,6 +375,7 @@ chip soc/intel/skylake end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on end # I2C #0 device pci 15.1 off end # I2C #1 device pci 15.2 on end # I2C #2 diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 108470bf92..98b678a5cf 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -44,7 +44,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -104,6 +103,7 @@ chip soc/intel/skylake device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on end # I2C #0 device pci 15.1 on end # I2C #1 device pci 15.2 off end # I2C #2 diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 94861473b9..ce725f6ba8 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -48,7 +48,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -274,6 +273,7 @@ chip soc/intel/skylake end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""ACPI0C50"" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index e672940f3c..3197288573 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -270,6 +269,7 @@ chip soc/intel/skylake device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0001"" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 7ee311699b..57444a92a5 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -37,7 +37,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -285,6 +284,7 @@ chip soc/intel/skylake device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0001"" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index c454348672..025b82b70a 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -291,6 +290,7 @@ chip soc/intel/skylake device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""SYTS7813"" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index aef571a9fc..3606ae21d5 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -43,7 +43,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -298,6 +297,7 @@ chip soc/intel/skylake end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""WCOM50C1"" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index d21f98474a..3587cda4be 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -48,7 +48,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -282,6 +281,7 @@ chip soc/intel/skylake end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""PNP0C50"" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 64ef501536..2bddae2692 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -271,6 +270,7 @@ chip soc/intel/skylake device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""WCOMCOHO"" -- cgit v1.2.3