From df81e07c37fe50ef225ddf2fa5c94c2e2ada013f Mon Sep 17 00:00:00 2001
From: T Michael Turney <quic_mturney@quicinc.com>
Date: Thu, 20 Jan 2022 11:41:59 -0800
Subject: herobrine: update SPI-NOR config options

Configuration support for 4k-byte addressing mode

BUG=b:215605946
TEST=Validated on qualcomm sc7280 developement board

Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Signed-off-by: T Michael Turney <quic_mturney@quicinc.com>
Change-Id: If82de6204446251dded1b83684677e6eb536e6fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
---
 src/mainboard/google/herobrine/Kconfig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/mainboard/google')

diff --git a/src/mainboard/google/herobrine/Kconfig b/src/mainboard/google/herobrine/Kconfig
index c6dfaaba84..ac3be6f1eb 100644
--- a/src/mainboard/google/herobrine/Kconfig
+++ b/src/mainboard/google/herobrine/Kconfig
@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select SOC_QUALCOMM_SC7280
 	select SPI_FLASH
 	select SPI_FLASH_WINBOND
+	select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
 	select SPI_FLASH_MACRONIX
 	select MAINBOARD_HAS_CHROMEOS
 	select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN
-- 
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