From d17a8623a54f40c3a8e0aab35859d8e18e73e4a0 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 3 Nov 2014 14:39:11 -0800 Subject: rk3288: Use timestamp region for pre-cbmem timestamps BUG=None BRANCH=None TEST=Compiles successfully for veyron_pinky Original-Change-Id: I3862e9bf2c32085c921adae4c1dcdf88ff0f3ff3 Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/227243 Original-Reviewed-by: Aaron Durbin Original-Commit-Queue: Furquan Shaikh Original-Tested-by: Furquan Shaikh (cherry picked from commit 0fabdbb05826160beb8ee8f89339b18a49e87ab8) Signed-off-by: Marc Jones Change-Id: I4504d29a43084d4bd406626899b25903200fa6d7 Reviewed-on: http://review.coreboot.org/10740 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/google/veyron_brain/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_danger/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_jerry/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_mickey/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_mighty/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_minnie/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_pinky/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_rialto/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_romy/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_shark/romstage.c | 25 ++++++------------------- src/mainboard/google/veyron_speedy/romstage.c | 25 ++++++------------------- 11 files changed, 66 insertions(+), 209 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c index 9f7b1a5de8..f243235d7b 100644 --- a/src/mainboard/google/veyron_brain/romstage.c +++ b/src/mainboard/google/veyron_brain/romstage.c @@ -79,13 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -93,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -109,13 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_danger/romstage.c b/src/mainboard/google/veyron_danger/romstage.c index 80d9081fed..e9857b8e0b 100644 --- a/src/mainboard/google/veyron_danger/romstage.c +++ b/src/mainboard/google/veyron_danger/romstage.c @@ -80,13 +80,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -97,13 +91,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -113,13 +106,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c index e509a4aec5..5ccbe3ec23 100644 --- a/src/mainboard/google/veyron_jerry/romstage.c +++ b/src/mainboard/google/veyron_jerry/romstage.c @@ -85,13 +85,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -102,13 +96,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -118,13 +111,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index 9f7b1a5de8..f243235d7b 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -79,13 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -93,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -109,13 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c index e509a4aec5..5ccbe3ec23 100644 --- a/src/mainboard/google/veyron_mighty/romstage.c +++ b/src/mainboard/google/veyron_mighty/romstage.c @@ -85,13 +85,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -102,13 +96,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -118,13 +111,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_minnie/romstage.c b/src/mainboard/google/veyron_minnie/romstage.c index 68ab661d44..9cdacc3e1a 100644 --- a/src/mainboard/google/veyron_minnie/romstage.c +++ b/src/mainboard/google/veyron_minnie/romstage.c @@ -86,13 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -103,13 +97,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -119,13 +112,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c index b536391249..3792e6273a 100644 --- a/src/mainboard/google/veyron_pinky/romstage.c +++ b/src/mainboard/google/veyron_pinky/romstage.c @@ -93,13 +93,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -110,13 +104,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -126,13 +119,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index 68ab661d44..9cdacc3e1a 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -86,13 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -103,13 +97,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -119,13 +112,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_romy/romstage.c b/src/mainboard/google/veyron_romy/romstage.c index 9f7b1a5de8..f243235d7b 100644 --- a/src/mainboard/google/veyron_romy/romstage.c +++ b/src/mainboard/google/veyron_romy/romstage.c @@ -79,13 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -93,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -109,13 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_shark/romstage.c b/src/mainboard/google/veyron_shark/romstage.c index 68ab661d44..9cdacc3e1a 100644 --- a/src/mainboard/google/veyron_shark/romstage.c +++ b/src/mainboard/google/veyron_shark/romstage.c @@ -86,13 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -103,13 +97,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -119,13 +112,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c index 68ab661d44..9cdacc3e1a 100644 --- a/src/mainboard/google/veyron_speedy/romstage.c +++ b/src/mainboard/google/veyron_speedy/romstage.c @@ -86,13 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); -#endif + timestamp_add_now(TS_START_ROMSTAGE); console_init(); configure_l2ctlr(); @@ -103,13 +97,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); -#endif + + timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -119,13 +112,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } -- cgit v1.2.3