From cd309ba1015926901163b47b9e8c4ae3f3b11080 Mon Sep 17 00:00:00 2001 From: Tyler Wang Date: Thu, 18 Jan 2024 19:05:01 +0800 Subject: mb/google/rex/var/karis: Set SOC_TCHSCR_RST output low in bootblock Check MTL EDS2, SOC_TCHSCR_RST(GPP_C01) default setting is NF1. Set SOC_TCHSCR_RST to output low in early_gpio_table. BUG=none TEST=Build and test on karis, touchscreen function works Change-Id: Ieebd3cf3c320bc895d036c372f792ec7b5d7ebf9 Signed-off-by: Tyler Wang Reviewed-on: https://review.coreboot.org/c/coreboot/+/80000 Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal Reviewed-by: Subrata Banik Reviewed-by: Eric Lai --- src/mainboard/google/rex/variants/karis/gpio.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/rex/variants/karis/gpio.c b/src/mainboard/google/rex/variants/karis/gpio.c index 8c0f9293dd..6bd23ca67b 100644 --- a/src/mainboard/google/rex/variants/karis/gpio.c +++ b/src/mainboard/google/rex/variants/karis/gpio.c @@ -403,6 +403,8 @@ static const struct pad_config early_gpio_table[] = { /* GPP_C00 : [] ==> EN_TCHSCR_PWR */ PAD_CFG_GPO(GPP_C00, 1, DEEP), + /* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */ + PAD_CFG_GPO(GPP_C01, 0, DEEP), }; static const struct pad_config romstage_gpio_table[] = { -- cgit v1.2.3