From c679ab12b119a351cb078c55edd3e771cc8389ca Mon Sep 17 00:00:00 2001 From: Jayvik Desai Date: Thu, 21 Nov 2024 04:38:48 +0530 Subject: mb/google/fatcat: Adjust EC host command range for fatcat_ish variant Adjusts the EC host command range for the fatcat_ish variant to 0x800-0x807 & 0x200-0x20f. This change is necessary because the microchip EC used on the Fatcat board has a smaller host command range than the ITE/Nuvoton ECs used on other Fatcat variants. without this patch: [SPEW ] LPC: Trying to open IO window from 800 size 8 [ERROR] LPC: Cannot open IO window: 800 size 8 [ERROR] No more IO windows with this patch: [SPEW ] LPC: Trying to open IO window from 800 size 8 BUG=b:370984186 TEST=Able to build fatcat/fatcat_ish w/o any error. Change-Id: I0d726d60d2a15d2dfaff35f570de479fdc6d15aa Signed-off-by: Jayvik Desai Reviewed-on: https://review.coreboot.org/c/coreboot/+/85221 Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N Reviewed-by: Subrata Banik Reviewed-by: Kapil Porwal --- src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb index a81f35e52c..c4e2276805 100644 --- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb +++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb @@ -4,11 +4,11 @@ chip soc/intel/pantherlake register "pmc_gpe0_dw1" = "GPP_D" register "pmc_gpe0_dw2" = "GPP_E" - # For Fatcat (with microchip EC): + # For Fatcat variants with microchip EC: # EC host command ranges are in 0x800-0x807 & 0x200-0x20f - # For other Fatcat variants (with ITE/Nuvoton EC): + # For Fatcat variants with ITE/Nuvoton EC: # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f - register "gen1_dec" = "CONFIG(BOARD_GOOGLE_FATCAT) ? 0x00040801 : 0x00fc0801" + register "gen1_dec" = "CONFIG(BOARD_GOOGLE_FATCAT) || CONFIG(BOARD_GOOGLE_FATCATISH) ? 0x00040801 : 0x00fc0801" register "gen2_dec" = "0x000c0201" # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" -- cgit v1.2.3