From ba6fdc892d62741e456ac5628fcd6f869c4cb9af Mon Sep 17 00:00:00 2001 From: David Wu Date: Mon, 25 Oct 2021 22:52:52 +0800 Subject: mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 setting Correct GPIO GPP_R6 and GPP_R7 setting to NF2 (DMIC_CLK1 and DMIC_DATA1). BUG=b:197385770 TEST=emerge-brask coreboot and verify it builds without error. Signed-off-by: David Wu Change-Id: Ia3813306f8c7b69fe5cf0e188c55256b68d329ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/58578 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/baseboard/brask/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index 777b816ff3..ae44c0de86 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -318,9 +318,9 @@ static const struct pad_config gpio_table[] = { /* R5 : HDA_SDI1 ==> DMIC_DATA0_R */ PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* R6 : I2S2_TXD ==> DMIC_CLK1_R */ - PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* R7 : I2S2_RXD ==> DMIC_DATA1_R */ - PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), /* S0 : SNDW0_CLK ==> NC */ PAD_NC(GPP_S0, NONE), -- cgit v1.2.3