From b09166d0e62ba8ebe0c27bb7b1e20cac4885aa08 Mon Sep 17 00:00:00 2001 From: Zheng Bao Date: Tue, 15 Feb 2022 00:38:54 +0800 Subject: mb/google/guybrush: Add a mainboard specific SPL table Chromebook needs to do some additional check, which is not available in the AMD's PI released SPL table. BUG=b:216096562 Change-Id: Ib8074641b9fc9b38239a6e3837b8569e14af3342 Signed-off-by: Zheng Bao Reviewed-on: https://review.coreboot.org/c/coreboot/+/61838 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Karthik Ramasubramanian Reviewed-by: Felix Held --- src/mainboard/google/guybrush/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig index b2fce84c85..a0040bf51b 100644 --- a/src/mainboard/google/guybrush/Kconfig +++ b/src/mainboard/google/guybrush/Kconfig @@ -99,6 +99,15 @@ config AMDFW_CONFIG_FILE string default "src/mainboard/google/guybrush/variants/baseboard/amdfw.cfg" +config HAVE_SPL_FILE + bool + default y + +config SPL_TABLE_FILE + string + depends on HAVE_SPL_FILE + default "3rdparty/blobs/mainboard/google/guybrush/TypeId0x55_SplTable_Prod_CZN_Chrome.sbin" + if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig config EFS_SPI_READ_MODE default 4 # Dual IO (1-2-2) -- cgit v1.2.3