From 9ffaf7f69260b2d08a01cbe155b58cfc932eea6a Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 12 Jul 2022 09:51:35 +0000 Subject: mb/google/rex: Add chip config for gspi devices +-----------+-------------+------------------+ | INTERFACE | PCI (B:D:F) | DEVICE | +-----------+-------------+------------------+ | GSPI-0 | 0:0x1e:2 | NA | +-----------+-------------+------------------+ | GSPI-1 | 0:0x1e:3 | Finger Print MCU | +-----------+-------------+------------------+ | GSPI-2 | 0:0x12:6 | NA | +-----------+-------------+------------------+ BUG=b:224325352 TEST=Able to build Google/Rex and boot to emulator. Signed-off-by: Subrata Banik Change-Id: I4b20e342cbca60821f82c07f72328cf63c0e5404 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65763 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/mainboard/google/rex/variants/rex0/overridetree.cb | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index 730af8bb30..e0cbc6e7d3 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -1,5 +1,11 @@ chip soc/intel/meteorlake + register "serial_io_gspi_mode" = "{ + [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, + [PchSerialIoIndexGSPI1] = PchSerialIoPci, + [PchSerialIoIndexGSPI2] = PchSerialIoDisabled, + }" + register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, -- cgit v1.2.3